W78LE58-24 Winbond, W78LE58-24 Datasheet
W78LE58-24
Related parts for W78LE58-24
W78LE58-24 Summary of contents
Page 1
... Four 8-bit bi-directional ports One 4-bit multipurpose programmable port Three 16-bit timer/counters One full duplex serial port Eight-sources, two-level interrupt capability Built-in power management Code protection Packaged in DIP 40: W78LE58-24 PLCC 44: W78LE58P-24 QFP 44: W78LE58F-24 Preliminary W78LE58 8-BIT MICROCONTROLLER Publication Release Date: June 2000 - 1 - Revision A1 ...
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... INT0, P3.2 29 PSEN 13 28 P2.7, A15 INT1, P3.3 14 T0, P3.4 27 P2.6, A14 15 T1, P3.5 26 P2.5, A13 16 WR, P3.6 25 P2.4, A12 17 24 P2.3, A11 RD, P3 P2.2, A10 XTAL2 XTAL1 19 22 P2.1, A9 VSS 20 21 P2.0, A8 44-Pin QFP (W78LE58F P0.4, AD4 38 P0.5, AD5 37 P0.6, AD6 36 P0.7, AD7 RXD, P3 INT2, P4.3 34 P4.1 TXD, P3.1 33 ALE INT0, P3.2 32 PSEN INT1, P3.3 31 P2.7, A15 T0, P3 ...
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... I/O H PORT 3: Function is the same as that of the standard 8052. P3.0 P3.7 I/O H PORT 4: A bi-directional I/O. See details below. P4.0 P4.3 * Note: TYPE I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain Preliminary W78LE58 DESCRIPTIONS Publication Release Date: June 2000 - 3 - Revision A1 ...
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... RAM The internal data RAM in the W78LE58 is 512 bytes divided into two banks: 256 bytes of scratchpad RAM and 256 bytes of AUX-RAM. These RAMs are addressed by different ways. RAM 0H 7FH can be addressed directly and indirectly as the same as in 8051. Address pointers are R0 and R1 of the selected register bank ...
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... The clock speed at capture or auto-reload mode is the same as that of Timers 0 and 1. Clock The W78LE58 is designed with either a crystal oscillator or an external clock. Internally, the clock is divided by two before it is used by default. This makes the W78LE58 relatively insensitive to duty cycle variations in the clock. ...
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... An internal trigger circuit in the reset line is used to deglitch the reset line when the W78LE58 is used with an external RC network. The reset logic also has a special glitch removal circuit that ignores glitches on the reset line. During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of bit 4) to 00H, and all of the other SFR registers except SBUF to 00H ...
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... EX2 bit of XICON. P42AL 00000000 P41AL 00000000 TL0 TL1 TH0 00000000 00000000 DPL DPH P40AL 00000000 00000000 INT2 and if enabled Preliminary W78LE58 P42AH P2ECON 00000000 0000xx00 P41AH 00000000 TH1 00000000 PCON P40AH 00110000 00000000 Publication Release Date: June 2000 Revision ...
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... Mode 2. P4 Write Strobe signal for chip select purpose. The address range depends on the SFR P43AH, P43AL, P43CMP1 and P43CMP0. 11: Mode 3. P4 Read/Write Strobe signal for chip select purpose. The address range depends on the SFR P43AH, P43AL, P43CMP1, and P43CMP0. Preliminary W78LE58 IT3 PX2 EX2 POLLING ...
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... P4.3 is active low when pin P4.3 is defined as read and/or write strobe signal. 6 P42CSINV The similarity definition as P43SINV. 5 P41CSINV The similarity definition as P43SINV. 4 P40CSINV The similarity definition as P43SINV Reserve 2 - Reserve Preliminary W78LE58 FUNCTION FUNCTION FUNCTION Publication Release Date: June 2000 - 9 - Revision A1 ...
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... Then any instruction MOVX @DPTR,A (with DPTR = 1234H 1237H) will generate the positive polarity write strobe signal at pin P4.0. And the instruction MOV P4,#XX will output the bit3 to bit1 of data #XX to pin P4.3 P4.1. Preliminary W78LE58 FUNCTION ; Base I/O address 1234H for P4.0 ; P4.0 a write strobe signal and address line A0 and A1 are masked. ...
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... P4xAH In-System Programming (ISP) Mode The W78LE58 equips one 32K byte of main MTP-ROM bank for application program (called APROM) and one 4K byte of auxiliary MTP-ROM bank for loader program (called LDROM). In the normal operation, the microcontroller executes the code in the APROM. If the content of APROM needs to be modified, the W78LE58 allows user to activate the In-System Programming (ISP) mode by setting the CHPCON register ...
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... Program 4KB LDROM Read 4KB LDROM FUNCTION programming. programming. CTRL<3:0> OEN 0 0010 1 0 0001 1 0 0000 0 1 0010 1 1 0001 1 1 0000 Preliminary W78LE58 CEN SFRAH, SFRAL SFRFD Address in Data in 0 Address in Data out Address in Data in 0 Address in Data out X X ...
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... User can press both two buttons at the same time and then turn on the power of the personal computer to force the W78LE58 to enter the F04KBOOT mode. After power on of personal computer, you can release both buttons and finish the in-system programming procedure to update the APROM code ...
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... F04KBOOT MODE P4.3 P2.7 P2.6 MODE FO4KBOOT FO4KBOOT The Reset Timing For Entering P2.7 P2.6 RST Preliminary W78LE58 F04KBOOT Mode Hi-Z Hi ...
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... In-System Programming mode) CPU will be wakened by interrupt and re-boot from 4KB LDROM to execute the loader program. Go Preliminary W78LE58 Part 1:32KB APROM procedure of entering In-System Programming Mode Execute the normal application program END ...
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... MOV SFRCN,#22H (Erase 32KB APROM) Start Timer and enter IDLE Mode. (Erasing...) End of erase operation. CPU will be wakened by Timer interrupt. PGM Preliminary W78LE58 Part 2: 4KB LDROM Procedure of Updating the 32KB APROM PGM Yes End of Programming ? No Setting Timer and enable Timer Is currently in the interrupt for wake-up ...
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... Reserved bits must be kept in logic 1. Lock bit This bit is used to protect the customer's program code in the W78LE58. It may be set after the programmer finishes the programming and verifies sequence. Once this bit is set to logic 0, both the MTP ROM data and Special Setting Registers can not be accessed again. ...
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... Oscillator Control W78LE58/E516 allow user to diminish the gain of on-chip oscillator amplifier by using programmer to set the bit B7 of security register. Once B7 is set half of gain will be decreased. Care must be taken if user attempts to diminish the gain of oscillator amplifier, reducing a half of gain may improperly affect the external crystal operation at high frequency above 24 MHz ...
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... 0.45 OL1 - 0. 0.45 OL2 - 0. SK1 1.8 5 SK2 4 2.4 - OH1 1 2.4 - OH2 1 -100 -250 SR1 -20 - -14 SR2 -1.9 -3 Preliminary W78LE58 UNIT TEST CONDITIONS 4.5V 2.4V 4.5V, I ...
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... ALE Pulse Width PSEN Pulse Width Notes: 1. P0.0 P0.7, P2.0 P2.7 remain stable throughout entire memory cycle. 2. Memory access time Data have been latched internally prior to PSEN going high. 4. " " (due to buffer driving delay and wire loading nS. Preliminary W78LE58 OP, CP SYMBOL MIN ...
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... Port Input Setup to ALE Low Port Input Hold from ALE Low Port Output to ALE Note: Ports are read during S5P2, and output data becomes available at the end of S6P2. The timing data are referenced to ALE, since it provides a convenient reference. Preliminary W78LE58 SYMBOL MIN. TYP. T ...
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... Data Read Cycle S4 S5 XTAL1 ALE PSEN PORT 2 A0-A7 PORT ALW T APL T PSW T AAS T PDA T T PDH, PDZ A0-A7 A0-A7 Code Data A8-A15 DATA T T DAR DDA T DDH, T DRD - 22 - Preliminary W78LE58 A0-A7 Data A0- DDZ ...
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... PSEN PORT 2 PORT 0 A0-A7 WR Port Access Cycle XTAL1 ALE T PORT INPUT SAMPLE A8-A15 DATA OUT T DAD T T DWR DAW PDS PDH - 23 - Preliminary W78LE58 DWD S1 T PDA DATA OUT Publication Release Date: June 2000 Revision A1 ...
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... A11 P2.3 74LS373 25 A12 P2.4 26 A13 T1 P2.5 27 A14 P2.6 28 P1.0 A15 P2.7 P1 P1.4 PSEN 30 P1.5 ALE P1.6 11 TXD P1.7 10 RXD Figure A C1 47P 30P 15P - 24 - Preliminary W78LE58 ...
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... P1.0 2 P1.1 3 P1.2 4 P1.3 5 P1.4 6 P1.5 7 P1.6 8 P1.7 W78LE58 PACKAGE DIMENSIONS 40-pin DIP Preliminary W78LE58 AD0 39 AD0 AD1 AD1 AD2 AD2 AD3 AD3 P0 AD4 ...
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... Detail Preliminary W78LE58 Dimension in inch Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. 0.185 4.699 A 0.020 0.508 0.150 3.81 0.145 0.155 3.683 3.937 2 b 0.026 0.028 0.032 ...
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... Application Note: In-system Programming Software Examples This application note illustrates the in-system programmability of the Winbond W78LE58 MTP-ROM microcontroller. In this example, microcontroller will boot from 32KB APROM bank and waiting for a key to enter in-system programming mode for re-programming the contents of 32KB APROM. While entering in-system programming mode, microcontroller executes the loader program in 4KB LDROM bank ...
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... LDROM MAIN PROGRAM ;************************************************************************ ORG 100H ; TIMER0 INTERRUPT ENABLE FOR WAKE-UP FROM IDLE MODE ; TL0 = FEH ; TH0 = FFH ; TMOD = 01H, SET TIMER0 A 16-BIT TIMER ; TCON = 10H, TR0 = 1,GO ; ENTER IDLE MODE FOR LAUNCHING THE IN-SYSTEM ; PROGRAMMING ; User's application program - 28 - Preliminary W78LE58 ...
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... START ADDRESS = 0H MOV SFRAL,#0H MOV R6,#FEH ; SET TIMER FOR READ OPERATION, ABOUT 1.5 S. MOV R7,#FFH MOV TL0,R6 MOV TH0,R7 BLANK_CHECK_LOOP: SETB TR0 ; ENABLE TIMER 0 MOV PCON,#01H ; ENTER IDLE MODE MOV A,SFRFD ; READ ONE BYTE Preliminary W78LE58 Publication Release Date: June 2000 - 29 - Revision A1 ...
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... VERIFY 32KB APROM BANK ;***************************************************************************** MOV R4,#03H ; ERROR COUNTER MOV R6,#FEH ; SET TIMER FOR READ VERIFY, ABOUT 1.5 S. MOV R7,#FFH MOV TL0,R6 MOV TH0,R7 MOV DPTR,#0H ; The start address of sample code MOV R2,#0H ; Target low byte address MOV R1,#0H ; Target high byte address Preliminary W78LE58 - 30 - ...
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... FAX: 886 -2-27197502 FAX: 886 -2-27197502 Note: All data and specifications are subject to change withou t notice. Note: All data and specifications are subject to change withou t notice. Preliminary W78LE58 Winbond Electronics (H.K.) Ltd. Winbond Electronics (H.K.) Ltd. Winbond Electronics North America Corp. Winbond Electronics North America Corp. ...