COP884CF National Semiconductor, COP884CF Datasheet - Page 28

• Manufacturer Part Number: COP884CF
• Description: 8-Bit CMOS ROM Based Microcontrollers with 4k Memory and A/D Converter
• Manufacturer: National Semiconductor

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Detection of Illegal Conditions
The device can detect various illegal conditions resulting
from coding errors transient noise power supply voltage
drops runaway programs etc
Reading of undefined ROM gets zeros The opcode for soft-
ware interrupt is zero If the program fetches instructions
from undefined ROM this will force a software interrupt
thus signaling that an illegal condition has occurred
The subroutine stack grows down for each call (jump to
subroutine) interrupt or PUSH and grows up for each re-
turn or POP The stack pointer is initialized to RAM location
06F Hex during reset Consequently if there are more re-
turns than calls the stack pointer will point to addresses
070 and 071 Hex (which are undefined RAM) Undefined
RAM from addresses 070 to 07F (Segment 0) and all other
segments (i e Segments 4
in turn will cause the program to return to address 7FFF
Hex This is an undefined ROM location and the instruction
fetched (all 0’s) from this location will generate a software
interrupt signaling an illegal condition
Thus the chip can detect the following illegal conditions
When the software interrupt occurs the user can re-initialize
the stack pointer and do a recovery procedure before re-
starting (this recovery program is probably similar to that
following reset but might not contain the same program
initialization procedures) The recovery program should re-
set the software interrupt pending bit using the RPND in-
struction
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a Executing from undefined ROM
b Over ‘‘POP’’ing the stack by having more returns than
calls
Don’t Care
Don’t Care
Mismatch
Match
Data
Key
etc ) is read as all 1’s which
Don’t Care
Don’t Care
Mismatch
Window
Match
Data
TABLE IV WATCHDOG Service Actions
TABLE V MICROWIRE PLUS
SL1
Master Mode Clock Select
0
0
1
Don’t Care
Don’t Care
Mismatch
Monitor
Clock
Match
SL0
0
1
x
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MICROWIRE PLUS
MICROWIRE PLUS is a serial synchronous communica-
tions interface The MICROWIRE PLUS capability enables
the device to interface with any of National Semiconductor’s
MICROWIRE peripherals (i e A D converters display driv-
ers E
support the MICROWIRE interface It consists of an 8-bit
serial shift register (SIO) with serial data input (SI) serial
data output (SO) and serial shift clock (SK) Figure 17
shows a block diagram of the MICROWIRE PLUS logic
The shift clock can be selected from either an internal
source or an external source Operating the MICROWIRE
PLUS arrangement with the internal clock source is called
the Master mode of operation Similarly operating the
MICROWIRE PLUS arrangement with an external shift
clock is called the Slave mode of operation
The CNTRL register is used to configure and control the
MICROWIRE PLUS mode To use the MICROWIRE PLUS
the MSEL bit in the CNTRL register is set to one In the
master mode the SK clock rate is selected by the two bits
SL0 and SL1 in the CNTRL register Table V details the
different clock rates that may be selected
Valid Service Restart Service Window
Error Generate WATCHDOG Output
Error Generate WATCHDOG Output
Error Generate WATCHDOG Output
FIGURE 17 MICROWIRE PLUS Block Diagram
2
4
8
2
SK
PROMs etc ) and with other microcontrollers which
c
c
c
t
t
t
c
c
c
Action
Where t
instruction cycle clock
c
is the
TL DD 12532– 15