ATMEGA128-8AI ATMEL Corporation, ATMEGA128-8AI Datasheet - Page 5

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ATMEGA128-8AI

Manufacturer Part Number
ATMEGA128-8AI
Description
8-bit Microcontroller with 128K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
ATmega103 Compatibility
Mode
Pin Descriptions
VCC
GND
Port A (PA7..PA0)
Port B (PB7..PB0)
Port C (PC7..PC0)
2467AS–08/01
The ATmega128 is 100% pin compatible with ATmega103, and can replace the
ATmega103 on current Printed Circuit Boards. The application note “Replacing
ATmega103 by ATmega128” describes what the user should be aware of replacing the
ATmega103 by an ATmega128.
By programming the M103C fuse, the ATmega128 will be compatible with the
ATmega103 regards to RAM, I/O pins and interrupt vectors as described above. How-
ever, some new features in ATmega128 are not available in this compatibility mode,
these features are listed below:
Digital supply voltage.
Ground.
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port A output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port A pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega128 as listed
on page 68 .
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATmega128 as listed
on page 69 .
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port C output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port C pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
One USART instead of two, asynchronous mode only. Only the 8 least significant
bits of the Baud Rate Register is available.
One 16 bits Timer/Counter with 2 compare registers instead of two 16-bit
Timer/Counters with 3 compare registers.
2-wire serial interface is not supported.
Port G serves alternate functions only (not a general I/O port).
Port F serves as digital input only in addition to analog input to the ADC.
Boot Loader capabilities is not supported.
It is not possible to adjust the frequency of the internal calibrated RC oscillator.
The External Memory Interface can not release any Address pins for general I/O,
neither configure different wait-states to different External Memory Address
sections.
ATmega128(L)
5

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