A8902CLBA Allegro MicroSystems, A8902CLBA Datasheet - Page 5
![no-image](/images/no-image-200.jpg)
A8902CLBA
Manufacturer Part Number
A8902CLBA
Description
3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING
Manufacturer
Allegro MicroSystems
Datasheet
1.A8902CLBA.pdf
(12 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A8902CLBA
Manufacturer:
ALLE
Quantity:
2 670
Company:
Part Number:
A8902CLBA
Manufacturer:
LT
Quantity:
2 677
Part Number:
A8902CLBA
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Term.
18-19
6-7
10
11
12
13
14
15
16
17
20
21
22
23
24
1
2
3
4
5
8
9
LOGIC SUPPLY
Terminal Name
SECTOR DATA
LOAD SUPPLY
CHIP SELECT
OSCILLATOR
CENTERTAP
DATA OUT
GROUND
GROUND
DATA IN
BRAKE
FILTER
RESET
CLOCK
OUT
OUT
OUT
C
C
C
C
C
RES
WD
D2
ST
D1
A
B
C
Function
V
One of two capacitors used to generate the ideal commutation points from the
back-EMF zero crossing points.
Timing capacitor used by the watchdog circuit to disable the back-EMF compara-
tors during commutation transients, and to detect incorrect motor position.
Startup oscillator timing capacitor.
Power amplifier A output to motor.
Power and logic ground and thermal heat sink.
Power amplifier B output to motor.
Power amplifier C output to motor.
Motor centertap connection for back-EMF detection circuitry.
Active low turns ON all three sink drivers shorting the motor windings to ground.
External capacitor and resistor at B
can also be controlled via the serial port.
External reservoir capacitor used to hold charge to drive the source drivers’
gates. Also provides power for brake circuit.
Analog voltage input to control motor current. Also, compensation node for
internal speed control loop.
External tachometer input. Can use sector or index pulses from disk to provide
precise motor speed feedback to internal frequency-locked loop.
V
Clock input for the speed reference counter. Typical max. frequency is 10 MHz.
Thermal shutdown indicator, FCOM, TACH, or SYNC signals available in real
time, controlled by 2-bit multiplexer in serial port.
Power and logic ground and thermal heat sink.
When pulled low forces the chip into sleep mode; clears all serial port bits.
Strobe input (active low) for data word.
Clock input for serial port.
Sequential data input for the serial port.
One of two capacitors used to generate the ideal commutation points from the
back-EMF zero crossing points.
BB
DD
; the 5 V or 12 V motor supply.
; the 5 V logic supply.
MOTOR CONTROLLER/DRIVER
3-PHASE BRUSHLESS DC
RAKE
provide brake delay. The brake function
8902–A