HIP6501 Intersil Corporation, HIP6501 Datasheet

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HIP6501

Manufacturer Part Number
HIP6501
Description
Triple Linear Power Controller with ACPI Control Interface
Manufacturer
Intersil Corporation
Datasheet

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Triple Linear Power Controller with ACPI
Control Interface
The HIP6501A, paired with either the HIP6020 or HIP6021,
simplifies the implementation of ACPI-compliant designs in
microprocessor and computer applications. The IC
integrates two linear controllers and a low-current pass
transistor, as well as the monitoring and control functions
into a 16-pin SOIC package. One linear controller generates
the 3.3V
5VSB output during sleep states (S3, S4/S5), powering the
PCI slots through an external pass transistor, as instructed
by the status of the 3.3V
transistor is used to switch in the ATX 3.3V output for PCI
operation during S0 and S1 (active) operatingstates. The
second linear controller supplies the computer system’s
2.5V/3.3V memory power through an external pass
transistor in active states. During S3 state, an integrated
pass transistor supplies the 2.5V/3.3V sleep-state power. A
third controller powers up a 5V
the ATX 5V output in active states, or the ATX 5VSB in sleep
states.
The HIP6501A’s operating mode (active-state outputs or
sleep-state outputs) is selectable through two control pins:
S3 and S5. Further control of the logic governing activation
of different power modes is offered through two enabling
pins: EN3VDL and EN5VDL. In active states, the 3.3V
linear regulator uses an external N-Channel pass MOSFET
to connect the output (V
supplied by an ATX (or equivalent) power supply, while
incurring minimal losses. In sleep state, the 3.3V
is supplied from the ATX 5VSB through an NPN transistor,
also external to the controller. Active state power delivery for
the 2.5/3.3V
transistor, or an NMOS switch for the 3.3V setting. In sleep
states, conduction on this output is transferred to an internal
pass transistor. The 5V
external MOS transistors. In sleep states, a PMOS (or PNP)
transistor conducts the current from the ATX 5VSB output,
while in active states, current flow is transferred to an NMOS
transistor connected to the ATX 5V output. Similar to the
3.3V
dictated not only by the status of the S3 and S5 pins, but that
of the EN5VDL pin as well.
Ordering Information
HIP6501ACB
HIP6501EVAL1
PART NUMBER
DUAL
DUAL
output, the operation of the 5V
MEM
voltage plane from an ATX power supply’s
output is done through an external NPN
Evaluation Board
RANGE (
TEMP.
0 to 70
DUAL
DUAL
OUT1
o
output is powered through two
) directly to the 3.3V input
C)
enable pin. An additional pass
1
DUAL
16 Ld SOIC
Data Sheet
PACKAGE
plane by switching in
DUAL
output is
DUAL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
M16.15
PKG.
output
NO.
DUAL
Features
• Provides 3 ACPI-Controlled Voltages
• Simple Control Design - No Compensation Required
• Excellent Output Voltage Regulation
• Fixed Output Voltages Require No Precision External
• Small Size
• Selectable 2.5V
• Under-Voltage Monitoring of All Outputs with Centralized
• Adjustable Soft-Start Function Eliminates 5VSB
Pinout
- 5V Active/Sleep (5V
- 3.3V Active/Sleep (3.3V
- 2.5V/3.3V Active/Sleep (2.5V
- 3.3V
- 2.5V/3.3V Output: 2.0% Over Temperature; Both
Resistors
- Small External Component Count
- 2.5V for RDRAM Memory
- 3.3V for SDRAM Memory
FAULT Reporting
Perturbations
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
States Only
Operational States (3.3V setting in sleep only)
February 2000
DUAL
3V3DLSB
EN3VDL
EN5VDL
3V3DL
5VSB
GND
Output: 2.0% Over Temperature; Sleep
S3
S5
MEM
1
2
3
4
5
6
7
8
HIP6501A (SOIC)
Output Voltage Via FAULT/MSEL Pin
DUAL
TOP VIEW
DUAL
)
File Number
)
MEM
16
15
14
13
12
11
10
9
)
FAULT/MSEL
VSEN2
DRV2
12V
SS
5VDL
5VDLSB
DLA
HIP6501A
4749.2

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