A6276 Allegro MicroSystems, A6276 Datasheet - Page 6

• Manufacturer Part Number: A6276
• Description: 16-BIT SERIAL-INPUT/ CONSTANTCURRENT LATCHED LED DRIVER
• Manufacturer: Allegro MicroSystems

A. Data Active Time Before Clock Pulse
B. Data Active Time After Clock Pulse
C. Clock Pulse Width, t
D. Time Between Clock Activation
E. Latch Enable Pulse Width, t
F. Output Enable Pulse Width, t
NOTE – Timing is representative of a 10 MHz clock.
Significantly higher speeds are attainable.
— Max. Clock Transition Time, t
6276
16-BIT SERIAL-INPUT,
CONSTANT-CURRENT
LATCHED LED DRIVER
(Data Set-Up Time), t
(Data Hold Time), t
and Latch Enable, t
w(CK)
su(L)
h(D)
su(D)
............................................... 50 ns
.............................................. 20 ns
............................................ 100 ns
w(L)
.......................................... 60 ns
w(OE)
DATA OUT
r
OUTPUT
OUTPUT
ENABLE
ENABLE
ENABLE
DATA IN
or t
CLOCK
SERIAL
SERIAL
................................... 100 ns
LATCH
OUT
OUT
................................ 4.5 s
f
.............................. 10 s
N
N
A
DATA
50%
B
t
p
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Worcester, Massachusetts 01615-0036 [phone]
C
50%
LOW = ALL OUTPUTS ENABLED
D
50%
50%
F
t
en(BQ)
50%
HIGH = ALL OUTPUTS DISABLED (BLANKED)
respective latch when the LATCH ENABLE is high (serial-to-
parallel conversion). The latches will continue to accept new
data as long as the LATCH ENABLE is held high. Applica-
tions where the latches are bypassed (LATCH ENABLE tied
high) will require that the OUTPUT ENABLE input be high
during serial data entry.
source drivers are disabled (OFF). The information stored in the
latches is not affected by the OUTPUT ENABLE input. With
the OUTPUT ENABLE input low, the outputs are controlled by
the state of their respective latches.
E
Information present at any register is transferred to the
When the OUTPUT ENABLE input is high, the output
90%
t
p
t
dis(BQ)
DATA
t
DATA
f
50%
HIGH = OUTPUT OFF
LOW = OUTPUT ON
t
r
Dwg. WP-029-1
10%
Dwg. WP-030-1
DATA