AT88SC0104C-WI ATMEL Corporation, AT88SC0104C-WI Datasheet - Page 5

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AT88SC0104C-WI

Manufacturer Part Number
AT88SC0104C-WI
Description
CRYPTOMEMORY 1KBIT
Manufacturer
ATMEL Corporation
Datasheet
Protocol Selection
Asynchronous
T = 0 Protocol
Synchronous
2-wire Serial Interface
2021ES–SMEM–07/04
The AT88SC0104C supports two different communication protocols.
The power-up sequence determines which of the two communication protocols will be
used.
This power-up sequence complies with ISO 7816-3 for a cold reset in smart card
applications.
The device will respond with a 64-bit ATR code, including historical bytes to indicate the
memory density within the CryptoMemory family. Once the asynchronous mode has
been selected, it is not possible to switch to the synchronous mode without powering off
the device.
Figure 2. Asynchronous T = 0 Protocol (Gemplus Patent)
The synchronous mode is the default after powering up V
on RST. For embedded applications using CryptoMemory in standard plastic packages,
this is the only communication protocol.
Figure 3. Synchronous 2-wire Protocol
Note:
CLK-SCL
CLK-SCL
I/O-SDA
Smart Card Applications: The asynchronous T = 0 protocol defined by ISO 7816-3
is used for compatibility with the industry’s standard smart card readers.
Embedded Applications: A 2-wire serial interface is used for fast and efficient
communication with logic or controllers.
V
Set I/O-SDA in receive mode.
Provide a clock signal to CLK-SCL.
RST goes high after 400 clock cycles.
Power-up V
After stable V
I/O-SDA
CC
RST
V cc
Five clock pulses must be sent before the first command is issued.
goes high; RST, I/O-SDA and CLK-SCL are low.
RST
V cc
CC
CC
, RST goes high also.
, CLK-SCL and I/O-SDA may be driven.
1
2
3
4
5
CC
AT88SC0104C
due to the internal pull-up
ATR
5

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