74LCX10 Fairchild Semiconductor, 74LCX10 Datasheet
74LCX10
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74LCX10 Summary of contents
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... General Description The LCX10 contains three 3-input NAND gates. The inputs tolerate voltages allowing the interface of 5V sys- tems to 3V systems. The 74LCX10 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintaining CMOS low power dissipation. Ordering Code: ...
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Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...
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AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t PLH t Output to Output Skew (Note 4) OSHL t OSLH Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any ...
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AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C Test t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input ...
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Schematic Diagram Generic for LCX Family 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow www.fairchildsemi.com Package Number M14A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...