LMC6681 National Semiconductor, LMC6681 Datasheet - Page 9

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LMC6681

Manufacturer Part Number
LMC6681
Description
Low Voltage / Rail-To-Rail Input and Output CMOS
Manufacturer
National Semiconductor
Datasheet

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t
t
SR
GBW
G
e
i
T.H.D.
Symbol
n
ON
OFF
AC Electrical Characteristics
m
n
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is in-
tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the electrical characteristics.
Note 2: Human body model, 1.5 k
Note 3: Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in exceeding the maxi-
mum allowed junction temperature of 150˚C. Output current in excess of
Note 4: The maximum power dissipation is a function of T
− T
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V
Note 8: V
negative slew rates.
Note 9: Input referred, V
Note 10: V
tive slew rates.
Note 11: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 12: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 13: CMRR
For CMRR
Note 14: V
Note 15: The propogation delays are measured using an input waveform of f = 5 Hz, and magnitude of 2.4V. Refer to Section 6.3 and Figures 14, 15 for a detailed
explanation.
Note 16: The V
tion tested. Limits at temperature extremes are guaranteed via correlation using temperature regression analysis methods. Refer to Section 6.2 for an overview of
the threshold voltages.
Unless otherwise specified, all limits guaranteed for T
M . Boldface limits apply at the temperature extremes (Note 16).
m
A
)/
JA
. All numbers apply for packages soldered directly into a PC board.
+
+
+
+
, 0
= 3V, V
= 3V. Connected as Voltage Follower with 2V step input, and the output is measured from 15%–85%. Number specified is the slower of the positive or
= 10V. Connected as voltage follower with 8V step Input, and output is measured from 15%–85%. Number specified is the slower of the positive or nega-
= 10V, V
Time Delay for
Device to Power ON
Time Delay for
Device to Power OFF
Slew Rate
Gain-Bandwidth Product
Phase Margin
Gain Margin
Amp-to-Amp Isolation
Input-Referred
Voltage Noise
Input-Referred
Current Noise
Total Harmonic Distortion
<
PD
+
V
and CMRR
(threshold low and threshold high) limits are guaranteed at room temperature and at temperature extremes. Room temperature limits are produc-
CM
CM
CM
<
= 0.5V. For sourcing and sinking, 0.5V
Parameter
+
V
= 0.5V. For Sourcing tests, 1V
+
= 10V, and R
/2 for 3V, 5V and 10V. For 1.8V and 2.2V, 0.25
are tested, and the number indicated is the lower of the two values. For CMRR
in series with 100 pF.
L
= 100 k
connected to 5V. Each amp excited in turn with 1 kHz to produce V
(Note 15)
(Note 15)
(Note 8)
V
V
f = 1 kHz
V
f = 1 kHz
f = 1 kHz, A
R
+
+
CM
L
J (max)
= 10V, (Note 10)
= 10V (Note 9)
= 10 k , V
V
O
= 0.5V
,
Conditions
V
5V. For Sinking tests, 5V
JA
O
, and T
J
V
2.5V.
= 25˚C, V
= +1
O
±
A
30 mA over long term may adversely affect reliability.
= 2 V
. The maximum allowable power dissipation at any ambient temperature is P
<
V
CM
9
PP
+
<
= 3V, V− = 0V, V
V
+
− 0.3.
V
(Note 5)
O
0.01
Typ
130
0.5
1.2
1.2
1.2
0.5
50
50
12
32
9V.
CM
LMC6681AI
LMC6682AI
LMC6684AI
+
, V
(Note 6)
= V
Limit
+
0.55
0.55
200
/2
0.7
0.7
2
O
<
V
= V
O
CM
= 2 V
+
<
/2, V
V
PP
+
LMC6681BI
LMC6682BI
LMC6684BI
.
for 1.8V, 2.2V, 3V, 5V, and 10V.
PD
(Note 6)
Limit
0.55
0.55
200
0.7
0.7
= 0.6V and R
2
www.national.com
D
= (T
Units
L
V/µs
MHz
Deg
min
dB
dB
µs
µs
%
>
J(max)
1

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