EL5373IUZT13 Intersil Corporation, EL5373IUZT13 Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/3/342/intersil_corporation_sml.jpg)
EL5373IUZT13
Manufacturer Part Number
EL5373IUZT13
Description
450MHz Differential Twisted-Pair Drivers
Manufacturer
Intersil Corporation
Datasheet
1.EL5373IUZT13.pdf
(13 pages)
Maximum reliability is maintained if the output current never
exceeds ±60mA. This limit is set by the design of the internal
metal interconnect.
Power Dissipation
With the high output drive capability of the EL5173 and
EL5373 it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
• T
• T
• θ
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
PD
Typical Applications
Twisted pair cable driver
PD
MAX
AMAX
JA
JMAX
=
i
= Thermal resistance of the package
×
=
= Maximum junction temperature
V
= Maximum ambient temperature
T
-------------------------------------------- -
S
JMAX
×
I
SMAX
Θ
–
JA
T
AMAX
+
V
S
×
EL5173/
EL5373
∆V
----------- -
R
10
LD
O
FIGURE 22. TWISTED PAIR CABLE DRIVER
50
50
EL5173, EL5373
Z
O
= 100Ω
Where:
• V
• I
• ∆V
• R
• I
• i = Number of channels
By setting the two PD
can solve the output current and R
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from V
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V
supply rail.
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
application
SMAX
LOAD
50Ω
50Ω
S
LD
O
= Total supply voltage
= Differential load resistance
= Maximum differential output voltage of the
= Load current
= Maximum quiescent supply current per channel
V
V
V
V
FB
IN
INB
REF
MAX
EL5175/
EL5375
0Ω
equations equal to each other, we
S
- pin becomes the negative
LOAD
to avoid the device
S
V
- pin is
OUT
S
+