LM6121J/883 National Semiconductor, LM6121J/883 Datasheet - Page 6

• Manufacturer Part Number: LM6121J/883
• Description: High Speed Buffer
• Manufacturer: National Semiconductor

www.national.com
Application Hints
POWER SUPPLY DECOUPLING
The method of supply bypassing is not critical for stability of
the LM6121 series buffers. However, their high current out-
put combined with high slew rate can result in significant
voltage transients on the power supply lines if much induc-
tance is present. For example, a slew rate of 900 V/µs into a
50
wiring inductance of 50 nH (which corresponds to approxi-
mately 1
minimize this problem use high quality decoupling very close
to the device. Suggested values are a 0.1 µF ceramic in par-
allel with one or two 2.2 µF tantalums. A ground plane is rec-
ommended.
LOAD IMPEDANCE
The LM6121 is stable to any load when driven by a 50
source. As shown in the Overshoot vs Capacitive Load
graph, worst case is a purely capacitive load of about
1000 pF. Shunting the load capacitance with a resistor will
reduce overshoot.
SOURCE INDUCTANCE
Like any high frequency buffer, the LM6121 can oscillate at
high values of source inductance. The worst case condition
occurs at a purely capacitive load of 50 pF where up to
100 nH of source inductance can be tolerated. With a 50
load, this goes up to 200 nH. This sensitivity may be reduced
at the expense of a slight reduction in bandwidth by adding a
resistor in series with the buffer input. A 100 resistor will en-
sure stability with source inductances up to 400 nH with any
load.
OVERVOLTAGE PROTECTION
The LM6121 may be severely damaged or destroyed if the
Absolute Maximum Rating of 7V between input and output
pins is exceeded.
If the buffer’s input-to-output differential voltage is allowed to
exceed
reverse-breakdown,
forward-biased base-emitter junction. Referring to the
LM6121 simplified schematic, the transistors involved are
Q1 and Q3 for positive inputs, and Q2 and Q4 for negative
inputs. If any current is allowed to flow through these junc-
tions, localized heating of the reverse-biased junction will oc-
cur, potentially causing damage. The effect of the damage is
typically increased offset voltage, increased bias current,
and/or degraded AC performance. Furthermore, this will de-
feat the short-circuit and over-temperature protection cir-
cuitry. Exceeding
stroy the device.
The device is best protected by the insertion of the parallel
combination of a 100 k
(C1) in series with the buffer input, and a 100 k
(R2) from input to output of the buffer (see Figure 1 ). This
network normally has no effect on the buffer output. How-
ever, if the buffer’s current limit or shutdown is activated, and
the output has a ground-referred load of significantly less
load produces a di/dt of 18 A/µs. Multiplying this by a
1
⁄
2
7V,
" of 22 gauge wire) result in a 0.9V transient. To
a
±
7V input with a shorted output will de-
base-emitter
and
resistor (R1) and a small capacitor
will
be
junction
in
series
will
with
resistor
be
in
a
6
than 100 k , a large input-to-output voltage may be present.
R1 and R2 then form a voltage divider, keeping the
input-output differential below the 7V Maximum Rating for in-
put voltages up to 14V. This protection network should be
sufficient to protect the LM6121 from the output of nearly any
op amp which is operated on supply voltages of
lower.
Application Hints
HEATSINK REQUIREMENTS
A heatsink may be required with the LM6321 depending on
the maximum power dissipation and maximum ambient tem-
perature of the application. Under all possible operating con-
ditions, the junction temperature must be within the range
specified under Absolute Maximum Ratings.
To determine if a heatsink is required, the maximum power
dissipated by the buffer, P(max), must be calculated. The for-
mula for calculating the maximum allowable power dissipa-
tion in any application is P
simple case of a buffer driving a resistive load as in Figure 2 ,
the maximum DC power dissipation occurs when the output
is at half the supply. Assuming equal supplies, the formula is
P
The next parameter which must be calculated is the maxi-
mum allowable temperature rise, T
by using the formula:
where: T
Using the calculated values for T
quired value for junction-to-ambient thermal resistance,
(J–A)
D
= I
FIGURE 1. LM6121 with Overvoltage Protection
, can now be found:
S
(2V
perature
T
J
A
(max) is the maximum allowable junction tem-
(max) is the maximum ambient temperature
+
) + V
T
R
(max) = T
+2
(J–A)
/2 R
= T
L
FIGURE 2.
.
J
R
D
(max) − T
(max)/P(max)
= (T
R
(max) and P(max), the re-
R
J
DS009223-8
(max). This is calculated
(max)−T
A
(max)
DS009223-6
A
)/
JA
. For the
±
15V or