DG526 Intersil Corporation, DG526 Datasheet - Page 8

• Manufacturer Part Number: DG526
• Description: Analog CMOS Latchable Multiplexers
• Manufacturer: Intersil Corporation

Minimum Input Timing Requirements
NOTES:
Test Circuits and Waveforms
†
LOGIC
INPUT
A
WRITE Pulse Width, t
A, EN Data Valid After WRITE (Stabilization Time), t
A, EN Data Valid After WRITE (Hold Time), t
RESET Pulse Width, t
1. Signals on V
2. Typical values are for design aid only, not guaranteed and not subject to production testing.
3. The algebraic convention whereby the most negative value is a minimum, and most positive value is a maximum, is used in this datasheet.
4.
5. I
6. Period of Reset (RS) pulse must be at least 50 s during or after power ON.
7. Parameter not tested. Parameter guaranteed by design or characterization.
0
Similar connections for DG526
FIGURE 3A. t
, A
OFF Isolation
D(ON)
1
, (A
WR
EN
2
+2.4V
)
is leakage from driver into “ON” switch.
3V
3V
0
0
FIGURE 1. WR TIMING WAVEFORMS
50
S
TRANSITION
, V
=
D
PARAMETER
20
WW
RS
or V
--------- -
GND
V D
EN
RS
A
A
A
V
S
0
1
2
IN
, where V
exceeding V+ or V- will be clamped by internal diodes. Limit diode forward current to maximum current ratings.
SWITCHING TIME TEST CIRCUIT
DG528
1.5V
WR
S
2
THRU S
†
S
-15V
t
WW
= input to OFF switch, and V
V+
V-
2.0V
S
S
D
+15V
1
7
8
t
DW
DG526, DG527, DG528, DG529
WD
1M
10V
Over Full Temperature Range
+10V
0.8V
DW
t
WD
WR, See Figure 1
A
A
RS, (Note 6), V
SWITCH
OUTPUT
0
0
35pF
, A
, A
1
1
V
MEASURED TERMINAL
, (A
, (A
D
12-8
2
2
D
), EN, WR; See Figure 1
), EN, WR; See Figure 1
= output due to V
†
LOGIC
INPUT
OUTPUT
SWITCH
Similar connections for DG527
FIGURE 3B. t
S
= 5V, See Figure 2
RS
+2.4V
V
3V
0V
O
0
FIGURE 2. RS TIMING WAVEFORMS
50
S
TRANSITION
.
GND
EN
RS
A
A
1.5V
0
1
S
SWITCHING TIME TEST CIRCUIT
2A
S
DG529
2B
t
RS
WR
THRU S
, AND S
MIN
300
180
500
30
t
OFF(RS)
†
-15V
V+
S
S
V-
4A ,
D
D
3B
1B
4B
A
B
+15V
1M
0.8V
10V
+10V
O
UNITS
ns
ns
ns
ns
SWITCH
OUTPUT
35pF
V
DB