ADG508F Analog Devices, ADG508F Datasheet - Page 3

• Manufacturer Part Number: ADG508F
• Description: 4/8 Channel Fault-Protected Analog Multiplexers
• Manufacturer: Analog Devices

A2
X
0
0
0
0
1
1
1
1
X = Don’t Care
TIMING DIAGRAMS (ADG528F)
Figure 1 shows the timing sequence for latching the switch
address and enable inputs. The latches are level sensitive; there-
fore, while WR is held low, the latches are transparent and the
switches respond to the address and enable inputs. This input
data is latched on the rising edge of WR.
REV. C
A0, A1, A2
WR
EN
A1
X
0
0
1
1
0
0
1
1
3V
0V
3V
0V
Table I. ADG508F Truth Table
X = Don’t Care
A2
X
X
X
0
0
0
0
1
1
1
1
50%
A0
X
0
1
0
1
0
1
0
1
Figure 1.
A1
X
X
X
0
0
1
1
0
0
1
1
2V
t
W
EN
0
1
1
1
1
1
1
1
1
A0
X
X
X
0
1
0
1
0
1
0
1
t
S
50%
EN
X
X
0
1
1
1
1
1
1
1
1
0.8V
ON SWITCH
NONE
1
2
3
4
5
6
7
8
t
Table III. ADG528F Truth Table
H
WR
g
X
0
0
0
0
0
0
0
0
0
RS
1
0
1
1
1
1
1
1
1
1
1
–3–
A1
X
0
0
1
1
X = Don’t Care
Figure 2 shows the Reset Pulsewidth, t
off Time, t
Note: All digital input signals rise and fall times are measured
from 10% to 90% of 3 V. t
SWITCH
Retains Previous Switch Condition
NONE (Address and Enable Latches Cleared)
NONE
1
2
3
4
5
6
7
8
ON
OUTPUT
SWITCH
RS
OFF
A0
X
0
1
0
1
3V
0V
0V
V
O
ADG508F/ADG509F/ADG528F
(RS).
Table II. ADG509F Truth Table
50%
EN
0
1
1
1
1
R
Figure 2.
= t
F
t
= 20 ns.
RS
t
OFF
ON SWITCH PAIR
NONE
1
2
3
4
(RS)
RS
, and the Reset Turn-
50%
0.8V
O