ADG732 Analog Devices, ADG732 Datasheet - Page 8

• Manufacturer Part Number: ADG732
• Description: 16-/32- Channel/ 3.5 1.8 V to 5.5 V/ 2.5 V/ Analog Multiplexers
• Manufacturer: Analog Devices

ADG726/ADG732
V
V
I
I
G N D
S
D
I N
V
R
R
I
I
I
V
V
I
C
C
C
C
t
t
t
t
Charge
Injection
Off Isolation A measure of unwanted signal coupling through an “OFF” switch.
Crosstalk
On Response The Frequency response of the “ON” switch.
Insertion
Loss
DD
SS
TRANSITION
OPEN
S
D
D
INL
ON
OFF
R
DD
SS
ON
FLAT(ON)
INL
INH
D
S
D
D
IN
, I
ON
(OFF)
,C
(V
(
(OFF)
(I
(OFF)
(OFF)
(
S
INH
S
S
)
(ON)
(ON)
)
)
)
Most positive power supply potential.
Most Negative power supply in a dual supply application. In single supply applications, connect to GND.
Positive supply current.
Negative supply current.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Analog voltage on terminals D, S
Ohmic resistance between D and S.
On resistance match between any two channels, i.e. R
Flatness is defined as the difference between the maximum and minimum value of on-resistance as mea
sured over the specified analog signal range.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Maximum input voltage for logic “0”.
Minimum input voltage for logic “1”.
Input current of the digital input.
“OFF” switch source capacitance. Measured with reference to ground.
“OFF” switch drain capacitance. Measured with reference to ground.
“ON” switch capacitance. Measured with reference to ground.
Digital input capacitance.
Delay time measured between the 50% and 90% points of the digital inputs and the switch “ON” condi
tion when switching from one address state to another.
Delay time between the 50% and 90% points of the
Delay time between the 50% and 90% points of the
“OFF” time measured between the 80% points of both switches when switching from one address state to
another.
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
A measure of unwanted signal is coupled through from one channel to another as a result of parasitic
capacitance.
The loss due to the ON resistance of the switch.
PRELIMINARY TECHNICAL DATA
TERMINOLOGY
–8–
ON
max - R
digital input and the switch “ON” condition.
digital input and the switch “OFF” condition.
ON
min
REV. PrD