CS7410-CM Cirrus Logic, CS7410-CM Datasheet - Page 32

• Manufacturer Part Number: CS7410-CM
• Description: CD/MP3/WMA Audio Controller
• Manufacturer: Cirrus Logic

4.5
32
25, 26, 27, 28,
29, 30, 31, 32,
33, 34, 35, 36
37
39
41
47
11, 13, 15, 20,
21, 22, 23, 24
25, 26, 27, 28,
29, 30, 31, 32,
33, 34, 35, 36
3, 4, 5, 6, 7, 8, 9,
10
46
41
47
48
ROM/NVRAM Interface
The ROM/NVRAM Interface pins are described in
memory that contains the firmware. The memory could be ROM, NVRAM (FLASH), EEPROM, or any com-
bination of these memory types. This interface can also connect to SRAM that would emulate a ROM on a
development system. The bus width is always 8 bits. Most of these pins are shared with the DRAM interface,
which operates simultaneously with the ROM/NVRAM interface. A number of pins are defined to accept con-
figuration input at power-up (see
uration resistor is required on pin PCM_DO_0 to select whether the processor will boot from internal or
external ROM.
Pin
Pin
DRAM
Address[11..0]
DR_RAS_L
DR_CAS_L
M_WE_L
M_AP_OE
NVMem Data[7..0]
NVM_Addr[11..0]
NVM_Addr[19..12]
NVM_Addr[20]
NVM_WE_L
NVM_OE_L
NVM_CE_L
Signal Name
Signal Name
Table 11. EDO DRAM Interface (Continued)
Table 12. ROM/NVRAM Interface
Table
Type
O
O
O
O
O
Type
7), allowing different branches to be taken in the firmware. A config-
O
O
O
O
O
O
B
Memory Address Bus.
Memory Row Address Strobe
Memory Column Address Strobe
Memory Write Enable
Memory Output Enable
Memory Data Bus (shared with bits [7:0] of DRAM data
bus).
Memory Address Bus[11..0] (shared with DRAM address
bus)
Memory Address Bus[19..12] (shared with bits [15..8] of
DRAM data bus).
Memory Address Bus[20] (DRAM BS_L pin).
NVRAM Write Enable (shared with DRAM WE_L pin)
NVRAM Write Enable (shared with DRAM WE_L pin)
ROM/NVRAM Chip Enable.
Table
12. This interface connects to the non-volatile
Description
Description
CS7410
DS553PP1