DS89C430-DS89C450 Dallas Semiconducotr, DS89C430-DS89C450 Datasheet - Page 35
DS89C430-DS89C450
Manufacturer Part Number
DS89C430-DS89C450
Description
Ultra-High-Speed Flash Microcontrollers
Manufacturer
Dallas Semiconducotr
Datasheet
1.DS89C430-DS89C450.pdf
(47 pages)
- Current page: 35 of 47
- Download datasheet (792Kb)
Figure 13. Page Mode 1, External Data Memory Access
(PAGES = 01, Stretch = 4, CD = 10)
Interrupts
The DS89C430 provides 13 interrupt sources. All interrupts, with the exception of the power fail, are controlled by a
series combination of individual enable bits and a global enable (EA) in the interrupt-enable register (IE.7). Setting
EA to a logic 1 allows individual interrupts to be enabled. Setting EA to a logic 0 disables all interrupts regardless of
the individual interrupt-enable settings. The power-fail interrupt is controlled by its individual enable only.
The interrupt enables and priorities are functionally identical to those of the 80C52, except that the DS89C430
supports five levels of interrupt priorities instead of the original two.
RD/WR
Port 0
Port 2
Port 0
Port 2
RD/WR
XTAL1
PSEN
PSEN
ALE
ALE
LSB LSB
LSB
Inst Inst
Inst Inst Inst Inst
Instruction
Instruction
LSB
MOVX
MOVX
Fetch
Fetch
LSB
LSB
Inst
Cycle
Cycle
LSB
LSB
1st
1st
Inst
Cycle
2nd
Cycle
2nd
MSB
Cycle
3rd
Cycle
3rd
MOVX Instruction (Page miss)
MOVX Instruction (Page hit)
35 of 47
Memory Access (Stretch = 4)
Memory Access (Stretch = 4)
Cycle
4th
Cycle
4th
Cycle
5th
Cycle
Data
LSB
9th
Data
LSB
Cycle
9th
LSB LSB LSB
Inst Inst Inst
LSB LSB
Inst
Inst
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