ADM1232AAN Analog Devices, ADM1232AAN Datasheet - Page 5

• Manufacturer Part Number: ADM1232AAN
• Description: Microprocessor Supervisory Circuit
• Manufacturer: Analog Devices

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CIRCUIT INFORMATION
PB RESET
The PB RESET input makes it possible to manually reset a system
using either a standard push-button switch or a logic low
input. An internal debounce circuit provides glitch immunity
when used with a switch, reducing the effects of glitches on the
line. The debounce circuit is guaranteed to cause the ADM1232A
to assert a reset if PB RESET is brought low for more than 20 ms
and is guaranteed to ignore low inputs of less than 1 ms.
PB RESET
Figure 2. Typical Push Button Reset Application
RESET
RESET
PB RESET
GND
V
V
CC
CC
ADM1232A
ADM1232
ADM1232
V
Figure 3. PB RESET
TOLERANCE
IL
TOLERANCE
STROBE
PB RESET
STROBE
TD
RESET
DELAY
RESET
PB RESET TIME
MICROPROCESSOR
I/O
RESET
RESET ACTIVE
V
IH
TIME
–5–
STROBE Timeout Selection
TD or time delay set is used to set the Strobe Timeout Period.
The Strobe Timeout Period is defined as being the maximum
time between high-to-low transitions (Figure 4) that STROBE
will accept before a reset will be asserted. The Strobe timeout
settings are listed in Table I.
Condition
TD = 0 V
TD = Floating
TD = V
TOLERANCE
The TOLERANCE input is used to determine the level V
vary below 5 V without the ADM1232A asserting a reset. Con-
necting TOLERANCE to ground will select a –5% tolerance
level and will cause the ADM1232A to generate a reset if V
falls below 4.75 V (typical). If TOLERANCE is connected to
V
ADM1232A to generate a reset if V
Check the parameters for the V
Specifications for more information.
RESET AND RESET OUTPUTS
While RESET is capable of sourcing and sinking current,
RESET is an open drain MOSFET which sinks current only.
Therefore, it is necessary to pull this output high.
RESET OUTPUT DELAY
CC
WHEN IS V
a –10% tolerance level is selected and will cause the
RESET
RESET
CC
V
STROBE
CC
CC
FALLING
PULSEWIDTH
+5V
STROBE
Figure 4. STROBE Parameters
Figure 5. Reset Output Delay
STROBE TIMEOUT PERIOD
Min
62.5
250
500
+4.25V (10% TRIP POINT)
+4.5V (5% TRIP POINT)
Table I.
CC
Typ
150
600
1200
trip point in the ADM1232A
CC
falls below 4.5 V (typical).
ADM1232A
Max
250
1000
2000
RESET OUTPUT DELAY
WHEN IS V
+5V
CC
RISING
Units
ms
ms
ms
CC
CC
can