TDA1315 Philips Semiconductors, TDA1315 Datasheet - Page 20

• Manufacturer Part Number: TDA1315
• Description: Digital audio input/output circuit DAIO
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Status
The status register consists of two bytes. A description of
the status register bits is given in Tables 10 and 11. After
a reset all bits in the status register will be one.
The various error conditions of the TDA1315H are
reflected in bits 0 to 6 of the first byte. The error bits are set
(LOW) when the corresponding error conditions occur,
they are reset (HIGH) only after the register has been read
by the microcontroller. Bit 7 reflects the active
transmit/receive state. It is updated after the TDA1315H
configuration, as determined by bit 0 of the first control
register byte, has been changed. This allows verification of
the mode change to, for example, release a mute signal
after a successful change.
Table 10 First byte of status register
1995 Jul 17
BIT
Digital audio input/output circuit (DAIO)
0
1
2
3
4
5
6
7
channel status mode
PLL lock condition
validity flag
parity check
biphase violation
user data overrun
channel status check
direction of data
DESCRIPTION
0 = professional
1 = consumer
0 = not locked
1 = locked
0 = error
1 = no error
0 = error
1 = no error
0 = error
1 = no error
0 = error
1 = no error
0 = change
1 = no change
0 = receive
1 = transmit
FUNCTION
20
Table 11 Second byte of status register
Note
1. Bits 6 and 7 in the second byte of the status register
Reset and standby mode
Figure 11 illustrates the timing for the toggling between
normal and standby mode.
In Figs 11 and 12, when activating PD or RESET, 0 ns can
be taken for t
receive mode).
The TDA1315H uses its internal oscillator for the reset and
standby function. This means that it is not necessary, in
any mode, to apply a clock at the SYSCLKI input for the
TDA1315H to perform the reset or standby function.
For resetting the TDA1315H only a small pulse is
necessary at the RESET input. The device then
automatically starts the oscillator (in the event that it is not
running). The system will then do a synchronous reset
(internally) during approximately 3 internal clock periods.
This t
the oscillator has started, whichever occurs last. Only
when this resetting has been accomplished will the
external pin programming (e.g. CLKSEL, I
read by the TDA1315H. The TDA1315H is then ready for
use.
BIT
6
7
0
1
2
3
4
5
(1)
(1)
contain the inversion of bits 7 and 6, respectively, of
the channel status, which are used as mode bits.
RESET
audio mute
IEC output enable
select IEC input
I
select I
select clock frequency
channel status (bit 7)
inverse mode bit (bit 6)
2
S-bus output enable
starts after the falling edge of RESET or when
ON:OSC
DESCRIPTION
2
S-bus source
when the oscillator is running (e.g.
Product specification
0 = enabled
1 = disabled
0 = enabled
1 = disabled
0 = TTL level
1 = high sensitivity
0 = enabled
1 = disabled
0 = SDAUX
1 = IEC or CD
0 = 384f
1 = 256f
0 = bit 7 set
1 = bit 7 reset
0 = bit 6 set
1 = bit 6 reset
TDA1315H
FUNCTION
2
SOEN etc.) be
s
s