M4A5-128/64-10YI LATTICE [Lattice Semiconductor], M4A5-128/64-10YI Datasheet - Page 13
M4A5-128/64-10YI
Manufacturer Part Number
M4A5-128/64-10YI
Description
High Performance E 2 CMOS In-System Programmable Logic
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
1.M4A5-12864-10YI.pdf
(62 pages)
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M4A5-128/64-10YI
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A reset/preset swapping feature in each macrocell allows for reset and preset to be exchanged,
providing flexibility. In asynchronous mode (Figure 8), a single individual product term is
provided for initialization. It can be selected to control reset or preset.
Note that the reset/preset swapping selection feature effects power-up reset as well. The
initialization functionality of the flip-flops is illustrated in Table 9. The macrocell sends its data
to the output switch matrix and the input switch matrix. The output switch matrix can route this
data to an output if so desired. The input switch matrix can send the signal back to the central
switch matrix as feedback.
Note:
1. Transparent latch is unaffected by AR, AP
Product Term
Individual
Reset
Power-Up
a. Reset
Reset
Figure 8. Asynchronous Mode Initialization Configurations
AR
D/L/T
0
0
1
1
Table 9. Asynchronous Reset/Preset Operation
AP
AR
Q
17466G-014
ispMACH 4A Family
AP
0
1
0
1
Product Term
CLK/LE
Individual
X
X
X
X
Preset
1
Power-Up
See Table 8
Preset
Q+
1
0
0
b. Preset
D/L/T
AP
AR
17466G-015
Q
13
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