ISPLSI2128V-60LJ84 LATTICE [Lattice Semiconductor], ISPLSI2128V-60LJ84 Datasheet - Page 9

• Manufacturer Part Number: ISPLSI2128V-60LJ84
• Description: 3.3V High Density Programmable Logic
• Manufacturer: LATTICE [Lattice Semiconductor]

Pin Description
1. NC pins are not to be connected to any active signal, VCC or GND.
RESET
I/O 0 - I/O 4
I/O 5 - I/O 9
I/O 10 - I/O 14
I/O 15 - I/O 19
I/O 20 - I/O 24
I/O 25 - I/O 29
I/O 30 - I/O 34
I/O 35 - I/O 39
I/O 40 - I/O 44
I/O 45 - I/O 49
I/O 50 - I/O 54
I/O 55 - I/O 59
I/O 60 - I/O 64
I/O 65 - I/O 69
I/O 70 - I/O 74
I/O 75 - I/O 79
I/O 80 - I/O 84
I/O 85 - I/O 89
I/O 90 - I/O 94
I/O 95 - I/O 99
I/O 100 - I/O 104
I/O 105 - I/O 109
I/O 110 - I/O 114
I/O 115 - I/O 119
I/O 120 - I/O 124
I/O 125 - I/O 127
IN 4 - IN 7
GOE 0, GOE 1
Y0, Y1, Y2
TDI/IN 0
TCK/IN 3
TMS/IN 1
VCC
NC
ispEN
TDO/IN 2
GND
1
NAME
160-PIN PQFP PIN NUMBERS
140
25,
30,
35,
41,
47,
52,
57,
66,
71,
76,
83,
88,
93,
106,
111,
116,
123,
128,
133,
138,
147,
152,
157,
4,
9,
14,
104,
100,
19
18,
23
24
97
60
22,
122,
2,
101,
102
26,
31,
36,
43,
48,
53,
58,
67,
72,
77,
84,
89,
94,
107,
112,
117,
124,
129,
134,
143,
148,
153,
158,
5,
10,
15,
141,
103, 98
21
42,
139,
20,
119,
27,
32,
37,
44,
49,
54,
63,
68,
73,
78,
85,
90,
95,
108,
113,
118,
125,
130,
135,
144,
149,
154,
160,
6,
11,
16
61,
62,
159
39,
142
28,
33,
38,
45,
50,
55,
64,
69,
74,
80,
86,
91,
96,
109,
114,
120,
126,
131,
136,
145,
150,
155,
1,
7,
12,
17
79,
59,
29,
34,
40,
46,
51,
56,
65,
70,
75,
81,
87,
92,
105,
110,
115,
121,
127,
132,
137,
146,
151,
156,
3,
8,
13,
99,
82,
176-PIN TQFP PIN NUMBERS
154
28,
33,
39,
45,
51,
57,
62,
73,
79,
84,
91,
96,
102,
117,
122,
128,
135,
140,
146,
151,
162,
168,
173,
4,
10,
15,
114,
110,
21
20,
25
26
107
66
24,
134,
2,
111,
9,
64,
112,
157,
29,
34,
40,
47,
52,
58,
63,
74,
80,
85,
92,
98,
103,
118,
123,
129,
136,
141,
147,
158,
163,
169,
174,
5,
11,
16,
155,
23
113,
46,
153,
22,
131,
18,
69,
115,
166
9
30,
35,
41,
48,
53,
59,
70,
75,
81,
86,
93,
99,
104,
119,
125,
130,
137,
142,
148,
159,
164,
170,
176,
6,
12,
17
67,
108
68,
175
43,
156
27,
78,
124,
Specifications ispLSI 2128V
31,
37,
42,
49,
54,
60,
71,
76,
82,
88,
94,
100,
105,
120,
126,
132,
138,
144,
149,
160,
165,
171,
1,
7,
13,
19
87,
65,
36,
97,
143,
32,
38,
44,
50,
56,
61,
72,
77,
83,
89,
95,
101,
116,
121,
127,
133,
139,
145,
150,
161,
167,
172,
3,
8,
14,
109,
90,
55,
106,
152,
Dedicated input pins to the device
Active Low (0) Reset pin which resets all
the registers in the device.
Dedicated Clock input. This clock input is
connected to one of the clock inputs of
all the GLBs in the device.
Input Dedicated in-system programming
Boundary Scan enable input pin. This pin is
brought low to enable the programming
mode. The TMS, TDI, TDO and TCK
controls become active.
Input This pin performs two functions.
When ispEN is logic low, it functions as a
serial data input pin to load programming
data into the device. When ispEN is high,
it functions as a dedicated input pin.
Input This pin performs two functions.
When ispEN is logic low, it functions as a
clock pin for the ISP/Boundary Scan state
machine.When ispEN is high, it functions as
a dedicated input pin.
Input This pin performs two functions.
When ispEN is logic low, it functions as a
mode control pin for the ISP/Boundary Scan
state machine. When ispEN is high, it
functions as a dedicated input pin.
Output/Input This pin performs two
functions. When ispEN is logic low, it
functions as an output pin to read serial
shift register data. When ispEN is high, it
functions as a dedicated input pin.
Ground (GND)
Vcc
No Connect.
Global Output Enable input pins
Input/Output Pins - These are the general
purpose I/O pins used by the logic array.
DESCRIPTION
Table 2-0002A/2128V