ADuM2250ARIZ-RL AD [Analog Devices], ADuM2250ARIZ-RL Datasheet - Page 10

• Manufacturer Part Number: ADuM2250ARIZ-RL
• Description: Hot-Swappable, Dual I2C Isolators, 5 kV
• Manufacturer: AD [Analog Devices]

ADuM2250/ADuM2251
APPLICATIONS INFORMATION
FUNCTIONAL DESCRIPTION
The ADuM2250/ADuM2251 interface on each side to I
nals. Internally, the bidirectional I
unidirectional channels communicating in opposite directions
via dedicated iCoupler isolation channels. One channel of each
pair (the Side 1 input of each I/O pin in Figure 6) implements
a special input buffer and output driver that can differentiate
between externally generated inputs and its own output signals.
It only transfers externally generated input signals to the
corresponding Side 2 data or clock pin.
Both the Side 1 and the Side 2 I
to an I
on either side causes the corresponding I/O pin across the
coupler to be pulled low enough to comply with the logic low
threshold requirements of other I
contention and latch-up is avoided by guaranteeing that the
input low threshold at SDA
the output low signal at the same pin. This prevents an output
logic low at Side 1 being transmitted back to Side 2 and pulling
down the I
Because the Side 2 logic levels/thresholds and drive capabilities
comply fully with standard I
ADuM2251 devices connected to a bus by their Side 2 pins
can communicate with each other and with other devices
having I
distinction between I
I
or drive capability of a component do not necessarily meet the
requirements of the I
ponent to communicate with an I
compliance refers to situations in which the logic levels and
drive capability of a component fully meet the requirements
of the I
Because the Side 1 pin has a modified output level/input thresh-
old, Side 1 of the ADuM2250/ADuM2251 can only communicate
with devices fully compliant with the I
words, Side 2 of the ADuM2250/ADuM2251 is I
while Side 1 is only I
The Side 1 I/O pins must not be connected to other I
buffers that implement a similar scheme of dual I/O threshold
detection. This latch-up prevention scheme is implemented in
several popular I
currently available from Analog Devices and other manufac-
turers. Care should be taken to review the data sheet of
potential I
buffer on a bus segment implements a dual threshold scheme.
A bus segment is a portion of the I
2
C compatibility refers to situations in which the logic levels
2
C bus operating in the 3.0 V to 5.5 V range. A logic low
2
C specification.
2
C compatibility as shown in Figure 7. Note the
2
2
C bus buffering products to ensure that only one
C bus by latching the state.
2
C level shifting and bus extension products
2
2
2
C-compatible.
C specification but still allow the com-
C compatibility and I
1
2
or SCL
C values, multiple ADuM2250/
2
C pins are designed to interface
2
2
2
C devices on the bus. Bus
C-compliant device. I
C signals are split into two
2
C bus that is isolated from
1
is at least 50 mV less than
2
C standard. In other
2
C compliance.
2
C-compliant
2
C
2
2
C sig-
C
Rev. A | Page 10 of 16
other portions of the bus by galvanic isolation, bus extenders, or
level shifting buffers. Table 11 shows how multiple ADuM2250/
ADuM2251 components can coexist on a bus as long as two
Side 1 buffers are not connected to the same bus segment.
Table 11. ADuM225x Buffer Compatibility
Side 1
Side 2
The output logic low levels are independent of the V
V
independent of V
Side 2 is designed to be at 0.3 V
ments. The Side 1 and Side 2 I/O pins have open-collector
outputs whose high levels are set via pull-up resistors to their
respective supply voltages.
Figure 7 shows a typical application circuit including the pull-up
resistors required for both Side 1 and Side 2 busses. Bypass capacitors
of between 0.1 pF and 0.01 pF are required between V
GND
is required for latch-up immunity if the ambient temperature
can be between 105°C and 125°C.
SECONDARY
DD2
SEGMENT
GND
GND
SDA
SCL
V
µCPU
BUS
DD1
OR
voltages. The input logic low threshold at Side 1 is also
NC
NC
NC
1
and V
1
1
1
1
1
2
3
4
5
6
7
8
Figure 7. Typical Isolated I
SYMBOL INDICATES A DUAL THRESHOLD INPUT BUFFER.
NC = NO CONNECT
V
DD2
DD1
OPTIONAL
GND
SDA
SCK
to GND
200Ω
ADuM2250
Figure 6. ADuM2250 Block Diagram
DD1
1
1
1
Side 1
No
Yes
DECODE
ENCODE
DECODE
ENCODE
. However, the input logic low threshold at
2
. The 200 Ω resistor shown in Figure 7
1
2
3
4
5
6
7
8
ADuM2250
2
C Interface Using ADuM2250
DD2
, consistent with I
ENCODE
DECODE
ENCODE
DECODE
16
15
14
13
12
11
10
Side 2
Yes
Yes
9
Data Sheet
2
DD1
16
15
14
13
12
11
10
C require-
9
V
SDA
SCK
GND
DD1
DD2
GND
NC
V
NC
SDA
SCL
NC
GND
DD2
and
I
2
2
2
2
to
2
C BUS
2
2
2