HT1382_1105 HOLTEK [Holtek Semiconductor Inc], HT1382_1105 Datasheet - Page 15

Manufacturer Part Number

HT1382_1105

Description

I2C/3-Wire Real Time Clock

Manufacturer

HOLTEK [Holtek Semiconductor Inc]

Datasheet

1.HT1382_1105.pdf (29 pages)

HT1382

Rev. 1.40

C/3-Wire Real Time Clock

Interrupt Mode Enable Bit - IME

Alarm Register

EEPROM User Data

This bit enables/disables the interrupt mode of the alarm function. When the IME bit is set to 1 , the

interrupt mode is enabled and when the IME bit is cleared to 0 , the interrupt mode is disabled and the

alarm operates in single mode.

The addresses of alarm registers are 0Bh to 10h. The data is stored in the BCD format. The MSB of

each alarm register is an enable bit. (enable= 1 ). These enable bits specify which alarm registers are

used to make the comparison between the alarm registers and the RTC registers. There is no alarm byte

for year. When a compare match condition exists, the AI bit is set to 1 , and the IRQ pin is activated.

To clear an alarm, the AI bit must be cleared to 0 . If the ARE bit is set to 1 , the AI bit will

automatically be cleared when the status register is read.

There are two alarm operation modes: Single mode and Interrupt Mode.

Single mode: set the AE bit to 1 , the IME bit to 0 , and disable the frequency output. When the RTC

activates the IRQ pin. The IRQ pin will remain low until the AI bit is cleared to 0 .

Interrupt mode: set the AE bit to 1 , the IME bit to 1 , and disable the frequency output. When the

RTC registers values match the alarm registers values, the IRQ pin will be pulled low for 250ms and

the AI bit will be set to 1 . This mode allows for a repetitive or recurring alarm function. When the

alarm is set, the device will continue to activate an alarm for each match of the alarm and the present

time. For example, if only the seconds are set, it will activate an alarm every minute, if only the

minutes are set, it will activate an alarm every hour.

The HT1382 provides 4 bytes EEPROM for user. The EEPROM will continue to operate in battery

backup mode. However, it should be noted that the I

mode. User must detect the status of EB bit before reading data or writing data. If the EB bit is 0 , it is

valid to read data or write data. If the EB bit is 1 , it is invalid to read data or write data.

C/3-wire interface is disabled in battery backup

May 27, 2011