RT8279 RICHTEK [Richtek Technology Corporation], RT8279 Datasheet - Page 11

• Manufacturer Part Number: RT8279
• Description: 5A, 36V, 500kHz Step-Down Converter
• Manufacturer: RICHTEK [Richtek Technology Corporation]

recovery time, V
ringing that would indicate a stability problem.
EMI Consideration
Since parasitic inductance and capacitance effects in PCB
circuitry
high side MOSFET is
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature. The maximum power
dissipation depends on the thermal resistance of IC
package, PCB layout, the rate of surroundings airflow and
temperature difference between junction to ambient. The
maximum power dissipation can be calculated by following
formula :
P
Where
temperature ,
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8279, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance
dependent. For PSOP-8 package, the thermal resistance
θ
thermal test board. The maximum power dissipation at
T
DS8279-01
JA
A
D(MAX)
= 25°C
is 75°C/W on the standard JEDEC 51-7 four-layers
= (T
T
would cause a spike voltage on SW pin when
J(MAX)
can be calculated by following formula :
5.5V to 32V
J(MAX)
December 2011
T
A
* : Optional
is the maximum operation junction
OUT
is the ambient temperature and the
V
− T
IN
A
can be monitored for overshoot or
turned-on/off, this spike voltage on
) / θ
Figure 3. Reference Circuit with Snubber and Enable Timing Control
R
JA
C
EN
EN
6, 9 (Exposed Pad)
*
*
4.7µF x 2
C
IN
7
5
θ
JA
VIN
EN
GND
is layout
RT8279
θ
JA
is
BOOT
SW
FB
1
8
4
snubber between SW and GND and make them as close
as possible to the SW pin (see Figure
is to add a resistor in series with the bootstrap
capacitor, C
capability to the high side MOSFET. It is strongly
recommended to reserve the R-C snubber during PCB
layout for EMI improvement. Moreover, reducing the SW
trace area and keeping the main power in a small loop will
be helpful on EMI performance. For detailed PCB layout
guide, please refer to the section of Layout Consideration.
P
(min.copper area PCB layout)
P
copper area PCB layout)
The thermal resistance
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
As shown in Figure 4, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 4a), θ
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 4.b) reduces the θ
increasing the copper area of pad to 70mm
reduces the θ
D(MAX)
D(MAX)
R
BOOT
R
C
S
S
=
*
*
*
=
(125°C
BOOT
(125°C
C
10nF
D
B550C
JA
BOOT
. But this method will decrease the driving
to 49°C/W.
− 25°C) / (49°C/W) = 2.04W (70mm
10µH
− 25°C) / (75°C/W) = 1.333W
L
θ
JA
of SOP-8 (Exposed Pad) is
R1
10k
R2
3.16k
JA
θ
to 64°C/W. Even further,
JA
can be decreased by
C
47µFx2
(POSCAP)
3).
OUT
RT8279
Another method
www.richtek.com
V
5V/5A
OUT
JA
2
(Figure 4.e)
is 75°C/W.
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