RT8268 RICHTEK [Richtek Technology Corporation], RT8268 Datasheet - Page 11

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RT8268

Manufacturer Part Number
RT8268
Description
2A, 24V, 400kHz Step-Down Converter
Manufacturer
RICHTEK [Richtek Technology Corporation]
Datasheet

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Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
C
to return V
time, V
would indicate a stability problem.
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P
Where T
temperature, T
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8268, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance θ
(Exposed Pad) package is 86°C/W and for SOP-8 is
120°C/W on the standard JEDEC 51-7 four-layers thermal
test board. The maximum power dissipation at T
can be calculated by following formula :
P
MSOP-10 (Exposed Pad)
P
SOP-8
The maximum power dissipation depends on operating
ambient temperature for fixed T
resistance θ
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation allowed.
DS8268-02 March 2011
D(MAX)
D(MAX)
D(MAX)
OUT
generating a feedback error signal for the regulator
OUT
= ( T
= (125°C − 25°C) / (120°C/W) = 0.833W for
= (125°C − 25°C) / (86°C/W) = 1.163W for
OUT
J(MAX)
LOAD
can be monitored for overshoot or ringing that
J(MAX)
JA
to its steady-state value. During this recovery
. For RT8268 packages, the Figure 3 of
A
(ESR) also begins to charge or discharge
is the ambient temperature and the θ
is the maximum operation junction
- T
OUT
A
) / θ
immediately shifts by an amount
JA
J(MAX)
JA
for MSOP-10
and thermal
A
= 25°C
JA
is
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT8268.
Keep the traces of the main current paths as short and
wide as possible.
Put the input capacitor as close as possible to the device
pins (VIN and GND).
LX node is with high frequency voltage swing and should
be kept at small area. Keep sensitive components away
from the LX node to prevent stray capacitive noise pick-
up.
Place the feedback components to the FB pin as close
as possible.
The GND and Exposed Pad should be connected to a
strong ground plane for heat sinking and noise protection.
Figure 3. Derating Curves for RT8268 Packages
1.2
1.1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
1
0
0
SOP-8
25
Ambient Temperature (°C)
50
MSOP-10 (Exposed Pad)
75
RT8268
Four Layer PCB
(°C)
www.richtek.com
100
125
11

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