TP2104N3 SUTEX [Supertex, Inc], TP2104N3 Datasheet

TP2104N3

Manufacturer Part Number

TP2104N3

Description

P-Channel Enhancement-Mode Vertical DMOS FETs

Manufacturer

SUTEX [Supertex, Inc]

Datasheet

1.TP2104N3.pdf (4 pages)

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11/12/01

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability

indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to

workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the

Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

Ordering Information

*Same as SOT-23. All units shipped on 3,000 piece carrier tape reels.

Features

❏ Free from secondary breakdown

❏ Low power drive requirement

❏ Ease of paralleling

❏ Low C

❏ Excellent thermal stability

❏ Integral Source-Drain diode

❏ High input impedance and high gain

❏ Complementary N- and P-channel devices

Applications

❏ Logic level interfaces – ideal for TTL and CMOS

❏ Solid state relays

❏ Battery operated systems

❏ Photo voltaic drives

❏ Analog switches

❏ General purpose line drivers

❏ Telecom switches

Absolute Maximum Ratings

Drain-to-Source Voltage

Drain-to-Gate Voltage

Gate-to-Source Voltage

Operating and Storage Temperature

Soldering Temperature*

Distance of 1.6 mm from case for 10 seconds.

-40V

DSS

DGS

ISS

and fast switching speeds

(max)

6.0Ω

DS(ON)

(max)

-2.0V

GS(th)

TO-236AB*

TP2104K1

-55°C to +150°C

P-Channel Enhancement-Mode

Vertical DMOS FETs

Order Number/Package

300°C

± 20V

TP2104N3

DGS

DSS

TO-92

Advanced DMOS Technology

These enhancement-mode (normally-off) transistors utilize a

vertical DMOS structure and Supertex’s well-proven silicon-gate

manufacturing process. This combination produces devices with

the power handling capabilities of bipolar transistors and with the

high input impedance and positive temperature coefficient inher-

ent in MOS devices. Characteristic of all MOS structures, these

devices are free from thermal runaway and thermally-induced

secondary breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a wide range

of switching and amplifying applications where high breakdown

voltage, high input impedance, low input capacitance, and fast

switching speeds are desired.

Package Options

Note: See Package Outline section for dimensions.

TP2104ND

Die

TO-236AB

(SOT-23)

top view

where ❋ = 2-week alpha date code

Product marking for SOT-23:

Low Threshold

P1L❋

TO-92

TP2104

S G D

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