SST89V564RD-33-I-PJ SST [Silicon Storage Technology, Inc], SST89V564RD-33-I-PJ Datasheet - Page 11

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SST89V564RD-33-I-PJ

Manufacturer Part Number
SST89V564RD-33-I-PJ
Description
FlashFlex51 MCU
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet
FlashFlex51 MCU
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
3.0 MEMORY ORGANIZATION
The device has separate address spaces for program and
data memory.
3.1 Program Flash Memory
There are two internal flash memory blocks in the device.
The primary flash memory block (Block 0) has 64/32
KByte. The secondary flash memory block (Block 1) has 8
KByte. Since the total program address space is limited to
64 KByte, the SFCF[1:0] bit are used to control program
©2003 Silicon Storage Technology, Inc.
FIGURE
3-1: P
FFFFH
0000H
ROGRAM
EA# = 0
64 KByte
M
External
EMORY
O
RGANIZATION FOR
FFFFH
1FFFH
2000H
0000H
SFCF[1:0] = 00
EA# = 1
56 KByte
11
8 KByte
Block 0
Block 1
SST89E564RD
bank selection. Please refer to Figure 3-1 and Figure 3-2
for the program memory configurations. Program bank
selection is described in the next section.
The 64K/32K x8 primary SuperFlash block is organized as
512/256 sectors, each sector consists of 128 Bytes.
The 8K x8 secondary SuperFlash block is organized as 64
sectors, each sector consists also of 128 Bytes.
For both blocks, the 7 least significant program address bits
select the byte within the sector. The remainder of the pro-
gram address bits select the sector within the block.
FFFFH
0000H
SFCF[1:0] = 01, 10, 11
AND
SST89V564RD
EA# = 1
64 KByte
Block 0
1207 F02.0
S71207-04-000
Data Sheet
12/03

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