SP8121JS SIPEX [Sipex Corporation], SP8121JS Datasheet - Page 4

• Manufacturer Part Number: SP8121JS
• Description: Monolithic, 12-Bit Data Acquisition System
• Manufacturer: SIPEX [Sipex Corporation]

SP8121 PINOUT
SP8121 PINOUT
STATUS — Identifies valid data output; goes to
logic high during conversion; goes to logic low
when conversion is completed and data is valid
R/C — Read/Convert — Initiates conversion on
the high-to-low transition; logic low discon-
nects data bus; logic high initiates read
CE — Chip Enable — Logic low disables read
or convert; logic high enables read or convert
LATCH — MUX Address Latch — Logic high
to low transition captures MUX address on
MUX address lines
MA
Selects analog input channels CH
DB
high is binary true; logic low binary false
SP8121DS/02
0
0
32 31
, MA
through DB
1
CONTROL
2
LOGIC
30 29 28 27 26 25
3
1
, MA
4
5
12-BIT ADC
2
6
11
— MUX Address 0, 1 & 2 —
7
— Data Outputs — Logic
8
24
9 10 11 12 13 14 15
23 22 21 20 19 18
MULTIPLEXER
8-CHANNEL
REF
0
DECODE
through CH
SP8121 Monolithic, 12-Bit Data Acquisition System
17
16
S
7
4
SP8121 CONTROL TRUTH TABLE
SP8121 MULTIPLEXER TRUTH TABLE
H -> L
H -> L
H -> L
H -> L
H -> L
H -> L
H -> L
H -> L
LATCH MA
L->H
CE
0
1
1
1
1
X
X
0
0
0
0
1
1
1
1
H ->L
R/C
2
0
0
1
MA
X
X
0
0
1
1
0
0
1
1
1
Start Conversion
Start Conversion
Start Conversion
Enable 12-bit Output
(when STATUS=0)
MA
© Copyright 2000 Sipex Corporation
OPERATION
X
X
0
1
0
1
0
1
0
1
0
CH
CH
CH
CH
CH
CH
CH
CH
Prev. CH “n” Held
Prev. CH “n” Held
OPERATION
O
1
2
3
4
5
6
7
Selected
Selected
Selected
Selected
Selected
Selected
Selected
Selected