XR16M752 EXAR [Exar Corporation], XR16M752 Datasheet - Page 35

• Manufacturer Part Number: XR16M752
• Description: HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

REV. 1.0.2
DLD[6]: Auto RS-485 Direction Control
•
•
DLD[7]: Infrared Encoder/Decoder Enable
•
•
Enhanced features are enabled or disabled using this register. Bit 0-3 provide single or dual consecutive
character software flow control selection (see
are selected, the double 8-bit words are concatenated into two sequential characters. Caution: note that
whenever changing the TX or RX flow control bits, always reset all bits back to logic 0 (disable) before
programming a new setting.
EFR[3:0]: Software Flow Control Select
Single character and dual sequential characters software flow control is supported. Combinations of software
flow control can be selected by programming these bits.
4.14
Logic 0 = Standard ST16C550 mode. Transmitter generates an interrupt when transmit holding register
becomes empty and transmit shift register is shifting data out. The RTS# output can be used as a general
purpose output or for Auto RTS flow control.
Logic 1 = Enable Auto RS485 Direction Control function. The direction control signal, RTS# pin, changes its
output logic state from HIGH to LOW one bit time after the last stop bit of the last character is shifted out.
Also, the Transmit interrupt generation is delayed until the transmitter shift register becomes empty. The
RTS# output pin will automatically return to a HIGH when a data byte is loaded into the TX FIFO. See
“Section 2.13, Auto RS485 Half-duplex Control” on page
Logic 0 = Enable the standard modem receive and transmit input/output interface (default).
Logic 1 = Enable infrared IrDA receive and transmit inputs/outputs. The TX/RX output/input are routed to the
infrared encoder/decoder. The data input and output levels conform to the IrDA infrared interface
requirement. While in this mode, the infrared TX output will be idling LOW.
PAGE 18.
EFR
C
ONT
X
X
0
0
1
0
1
Enhanced Feature Register (EFR)
BIT
-3
-3
DLD[5]
0
0
1
EFR
C
ONT
X
X
0
0
0
1
1
BIT
-2
-2
T
ABLE
EFR
C
ONT
15: S
T
X
X
X
X
0
0
1
ABLE
BIT
-1
-1
OFTWARE
14: S
Table
EFR
C
AMPLING
ONT
DLD[4]
15). When the Xon1 and Xon2 and Xoff1 and Xoff2 modes
0
X
X
X
X
0
0
F
BIT
35
LOW
X
-0
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
0
1
-0
C
R
No TX and RX flow control (default and reset)
No transmit flow control
Transmit Xon1, Xoff1
Transmit Xon2, Xoff2
Transmit Xon1 and Xon2, Xoff1 and Xoff2
No receive flow control
Receiver compares Xon1, Xoff1
ONTROL
ATE
T
16.
RANSMIT AND
S
ELECT
F
UNCTIONS
R
ECEIVE
SEE”INFRARED MODE” ON
XR16M752/XR68M752
S
S
OFTWARE
AMPLING
16X
8X
4X
F
R
LOW
ATE
C
ONTROL