XR16L580_07 EXAR [Exar Corporation], XR16L580_07 Datasheet - Page 21
XR16L580_07
Manufacturer Part Number
XR16L580_07
Description
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
Manufacturer
EXAR [Exar Corporation]
Datasheet
1.XR16L580_07.pdf
(52 pages)
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REV. 1.4.1
The L580 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally
including automatic hardware and software flow control.
configured. Transmit data from the transmit shift register output is internally routed to the receive shift register
input allowing the system to receive the same data that it was sending. The TX pin is held at logic 1 or mark
condition while RTS# and DTR# are de-asserted, and CTS#, DSR# CD# and RI# inputs are ignored. Caution:
the RX input pins must be held to a logic 1 during loopback test else upon exiting the loopback test the UART
may detect and report a false “break” signal.
2.19
Internal Loopback
F
IGURE
14. I
NTERNAL
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
L
Transmit Shift Register
Receive Shift Register
OOP
B
(RHR/FIFO)
(THR/FIFO)
ACK
RTS#
CTS#
DTR#
DSR#
CD#
RI#
21
M CR bit-4=1
Figure 14
VCC
OP2#
OP1#
VCC
VCC
shows how the modem port signals are re-
TX
RX
RTS#
CTS#
DTR#
DSR#
RI#
CD#
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