AK4388A AKM [Asahi Kasei Microsystems], AK4388A Datasheet - Page 13

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AK4388A

Manufacturer Part Number
AK4388A
Description
192kHz 24-Bit 2ch ?? DAC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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When the MCLK, LRCK or BICK stops, the digital circuit of the AK4388A is placed in power-down mode. When the
MCLK, LRCK and BICK are restarted, power-down mode is released and the AK4388A returns to normal operation
mode.
Notes.
MS1008-E-02
Reset Function (MCLK, LRCK or BICK stop)
(1) The analog output corresponding to a specific digital input has group delay (GD).
(2) Digital data can be stopped. The click noise, after MCLK, LRCK and BICK are input again, can be reduced by
(3) Click noise occurs within 20usec or 20usec +3 ~ 4LRCK from the riding edge (“↑”) of the RSTN pin or MCLK
(4) The analog output becomes idle voltage when MCLK is stopped. It becomes VCOM voltage if LRCK or BICK is
(5) Mute the analog output externally if click noise (3) adversely affect system performance.
Internal
D/A In
D/A Out
<Case1:MCLK Stop>
Clock In
MCLK, BICK, LRCK
<Case2:LRCK Stop>
Clock In
MCLK, BICK, LRCK
<Case3:BICK Stop>
Clock In
MCLK, BICK, LRCK
RSTN pin
External
MUTE
External
MUTE
External
MUTE
(Analog)
inputting the “0” data during this period.
inputs. Click noise also occurs within 20usec when MCLK, LRCK or BICK is stopped.
stopped when MCLK is input.
(Digital)
State
Power-down
Power-down
VCOM
(5)
(5)
(5)
(3)
Normal Operation
Figure 10. Clock Stop Sequence
GD
(1)
- 13 -
(5)
(5)
(3)
Digital Circuit Power-down
MCLK Stop
LRCK Stop
BICK Stop
(5)
(2)
(4)
(3)
(5)
(5)
Normal Operation
GD
(1)
[AK4388A]
2010/09

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