X4163 INTERSIL [Intersil Corporation], X4163 Datasheet - Page 16

• Manufacturer Part Number: X4163
• Description: CPU Supervisor with 16K EEPROM
• Manufacturer: INTERSIL [Intersil Corporation]

TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Notes: (1) t
SDA OUT
Symbol
SDA IN
t
WC
SCL
SDA
SCL
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
(1)
WC
SDA IN
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
SCL
t
WP
SU:STA
8th bit of Last Byte
t
16
HD:STA
t
F
START
Write Cycle Time
Parameter
t
SU:DAT
t
SU:WP
t
HIGH
ACK
X4163, X4165
Clk 1
t
LOW
t
HD:DAT
Slave Address Byte
Condition
Stop
Min.
t
R
t
AA
t
WC
t
t
Typ.
DH
HD:WP
Clk 9
5
(1)
Condition
Start
t
BUF
Max.
10
t
SU:STO
Unit
April 13, 2005
ms
FN8120.0