X5168 INTERSIL [Intersil Corporation], X5168 Datasheet

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X5168

Manufacturer Part Number
X5168
Description
CPU Supervisor with 16Kbit SPI EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheets

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CPU Supervisor with 16Kbit SPI EEPROM
These devices combine three popular functions, Power-on
Reset Control, Supply Voltage Supervision, and Block Lock
Protect Serial EEPROM Memory in one package. This
combination lowers system cost, reduces board space
requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The device’s low V
system from low voltage conditions by holding
RESET/RESET active when V
trip point. RESET/RESET remains asserted until V
to proper operating level and stabilizes. Five industry
standard V
unique circuits allow the threshold to be reprogrammed to
meet custom requirements or to fine-tune the threshold in
applications requiring higher precision.
Block Diagram
TRIP
SCK
V
thresholds are available, however, Intersil’s
SO
CS
WP
CC
SI
CC
detection circuitry protects the user’s
®
1
CC
falls below a minimum V
V
Data Sheet
Command
Decode &
TRIP
Register
Control
Logic
Data
+
-
CC
returns
1-888-INTERSIL or 1-888-468-3774
CC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Protect Logic
Power-on and
Low Voltage
Generation
Register
Timebase
4Kbits
4Kbits
8Kbits
Status
Reset
Reset
Features
• Low V
• Long Battery Life with Low Power Consumption
• 16Kbits of EEPROM
• Built-in Inadvertent Write Protection
• 2MHz SPI Interface Modes (0,0 & 1,1)
• Minimize EEPROM Programming Time
• 2.7V to 5.5V and 4.5V to 5.5V Power Supply
• Available Packages
• Pb-Free Plus Anneal Available (RoHS Compliant)
- Five standard reset threshold voltages
- Re-program low V
- Reset signal valid to V
- <50µA max standby current, watchdog on
- <1µA max standby current, watchdog off
- <400µA max active current during read
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
- In circuit programmable ROM mode
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
Operation
- 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
special programming sequence
Lock
All other trademarks mentioned are the property of their respective owners.
CC
June 15, 2006
|
Detection and Reset Assertion
protection
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
(Replaces X25268, X25169)
CC
reset threshold voltage using
CC
RESET/RESET
X5168 = RESET
X5169 = RESET
= 1V
X5168, X5169
FN8130.2

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