X40420 XICOR [Xicor Inc.], X40420 Datasheet - Page 6

• Manufacturer Part Number: X40420
• Description: Dual Voltage Monitor with Integrated CPU Supervisor and System Battery Switch
• Manufacturer: XICOR [Xicor Inc.]

Figure 5. Sample V
X40420/X40421 – Preliminary
Resetting the V
To reset a V
(Vp) to the WDO pin before a START condition is set up
on SDA. Next, issue on the SDA pin the Slave Address
A0h followed by the Byte Address 03h for V
0Bh for V
to reset V
ation initiates the programming sequence. Pin WDO must
then be brought LOW to complete the operation.
After being reset, the value of V
value of 1.7V or lesser.
Note: This operation does not corrupt the memory array.
System Battery Switch
As long as V
V
cal) switch. When the V
V
than V
– 0.03V, then V
Ohm (typical) switch. V
static RAM voltage, so the switchover circuit operates to
protect the contents of the static RAM during a power fail-
ure. Typically, when V
lower power state and draw much less current than in
their active mode. When V
back to V
a 60mV hysteresis around this battery switch threshold to
prevent oscillations between supplies.
While V
pulled LOW. The signal can drive an external PNP tran-
sistor to provide additional current to the external circuits
during normal operation.
Operation
The device is in normal operation with V
V
when V
REV 1.2.14 7/12/02
TRIP
CC
CC
V
Adj.
TRIP1
is applied to V
> V
, V
BATT
CC
OUT
CC
TRIP1
TRIP2
TRIPx
CC
goes away.
TRIPx
– 0.03V. When V
is connected to V
CC
is connected to V
when V
. It switches to the battery backup mode
, followed by 00h for the Data Byte in order
. The STOP bit following a valid write oper-
OUT
exceeds the low voltage detect threshold
TRIPx
voltage, apply the programming voltage
OUT
is connected to V
CC
TRIP
CC
V
Voltage
Adj.
TRIP2
OUT
CC
exceeds V
has failed, the SRAMs go into a
if V
Reset Circuit
has fallen below V1
typically supplies the system
CC
CC
CC
CC
OUT
TRIPx
drops to less than V
is or equal to or greater
returns, V
through a 5 Ohm (typi-
BATT
RESET
V2FAIL
the BATT-ON pin is
4.7K
becomes a nominal
BATT
+ 0.03V. There is
CC
through an 80
OUT
as long as
TRIP1
TRIP
switches
www.xicor.com
, then
BATT
and
1
6
2
7
X40420
Control Register
The Control Register provides the user a mechanism for
changing the Block Lock and Watchdog Timer settings.
The Block Lock and Watchdog Timer bits are nonvolatile
and do not change when power is removed.
The Control Register is accessed with a special preamble
in the slave byte (1011) and is located at address 1FFh. It
can only be modified by performing a byte write operation
directly to the address of the register and only one data
byte is allowed for each register write operation. Prior to
writing to the Control Register, the WEL and RWEL bits
must be set using a two step process, with the whole
sequence requiring 3 steps. See "Writing to the Control
Registers" on page 8.
The user must issue a stop, after sending this byte to the
register, to initiate the nonvolatile cycle that stores WD1,
WD0, PUP1, PUP0, and BP . The X40420 will not
acknowledge any data bytes written after the first byte is
entered.
The state of the Control Register can be read at any time
by performing a random read at address 01Fh, using the
special preamble. Only one byte is read by each register
read operation. The master should supply a stop condi-
tion to be consistent with the bus protocol, but a stop is
not required to end this operation.
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit must be set to “1” prior to a write to the
Control Register.
PUP1 WD1 WD0
V
V
V
0 V
and V
CC
CC
BATT
13
7
14
9
8
Condition
> V
> V
CC
CC
= 0
TRIP1
TRIP1
6
< V
V
TRIP1
BATT
&
5
Characteristics subject to change without notice.
Adjust
Normal Operation
Normal Operation without battery
backup capability
Battery Backup mode; RESET
signal is asserted. No communica-
tion to the device is allowed.
Run
BP
4
V
Mode of Operation
P
3
0
RWEL WEL PUP0
SCL
SDA
2
µC
1
6 of 25
0