LT1815 LINER [Linear Technology], LT1815 Datasheet - Page 12

• Manufacturer Part Number: LT1815
• Description: Single/Dual/Quad 220MHz, 1500V/us Operational Amplifiers with Programmable Supply Current
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LT1815
LT1816/LT1817
Layout and Passive Components
As with all high speed amplifiers, the LT1815/LT1816/
LT1817 require some attention to board layout. A ground
plane is recommended and trace lengths should be mini-
mized, especially on the negative input lead.
Low ESL/ESR bypass capacitors should be placed directly
at the positive and negative supply (0.01 F ceramics are
recommended). For high drive current applications, addi-
tional 1 F to 10 F tantalums should be added.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking or
even oscillations. If feedback resistors greater than 1k are
used, a parallel capacitor of value:
should be used to cancel the input pole and optimize
dynamic performance. For applications where the DC
noise gain is 1 and a large feedback resistor is used, C
should be greater than or equal to C
be an I-to-V converter.
Input Considerations
The inputs of the LT1815/LT1816/LT1817 amplifiers are
connected to the base of an NPN and PNP bipolar transis-
tor in parallel. The base currents are of opposite polarity
and provide first-order bias current cancellation. Due to
variation in the matching of NPN and PNP beta, the
polarity of the input bias current can be positive or
negative. The offset current, however, does not depend
on beta matching and is tightly controlled. Therefore, the
use of balanced source resistance at each input is recom-
mended for applications where DC accuracy must be
maximized. For example, with a 100 source resistance
at each input, the 800nA maximum offset current results
in only 80 V of extra offset, while without balance the 8 A
maximum input bias current could result in a 0.8mV offset
contribution.
The inputs can withstand differential input voltages of up
to 6V without damage and without needing clamping or
series resistance for protection. This differential input
voltage generates a large internal current (up to 80mA),
12
C
F
> R
G
• C
IN
/R
F
U
U
W
IN
. An example would
U
F
which results in the high slew rate. In normal transient
closed-loop operation, this does not increase power
dissipation significantly because of the low duty cycle of
the transient inputs. Sustained differential inputs, how-
ever, will result in excessive power dissipation and there-
fore this device should not be used as a comparator .
Capacitive Loading
The LT1815/LT1816/LT1817 are optimized for high band-
width and low distortion applications. They can drive a
capacitive load of 10pF in a unity-gain configuration and
more with higher gain. When driving a larger capacitive
load, a resistor of 10
between the output and the capacitive load to avoid ringing
or oscillation. The feedback should still be taken from the
output so that the resistor will isolate the capacitive load
to ensure stability.
Slew Rate
The slew rate of the LT1815/LT1816/LT1817 is proportional
to the differential input voltage. Therefore, highest slew rates
are seen in the lowest gain configurations. For example, a
5V output step in a gain of 10 has a 0.5V input step, whereas
in unity gain there is a 5V input step. The LT1815/LT1816/
LT1817 are tested for a slew rate in a gain of – 1. Lower
slew rates occur in higher gain configurations.
Programmable Supply Current
(LT1815/LT1816A)
In order to operate the LT1815S6 or LT1816A at full speed
(and full supply current), connect the I
negative supply through a resistance of 75 or less.
To adjust or program the supply current and speed of the
LT1815S6 or LT1816A, connect an external resistor (R
between the I
Figure 1. The amplifiers are fully functional with 0 R
supply current vary with the value of the programming
resistor R
section of the data sheet specifies maximum supply
current and offset voltage, as well as minimum gain
bandwidth and output current at the maximum R
of 40k.
40k. Figures 2 and 3 show how the gain bandwidth and
SET
SET
. In addition, the Electrical Characteristics
pin and the negative supply as shown in
to 50
should be connected
SET
pin to the
SET
181567fa
value
SET
SET
)