HT83F10 HOLTEK [Holtek Semiconductor Inc], HT83F10 Datasheet - Page 28

• Manufacturer Part Number: HT83F10
• Description: Flash Type Voice OTP MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

I
The I
face originally developed by Philips. The possibility of
transmitting and receiving data on only 2 lines offers
many new application possibilities for microcontroller
based applications.
Rev. 1.00
2
C Interface
I
As the I
pins and with the SPI function pins, the I
must first be enabled by selecting the correct configu-
ration option.
There are two lines associated with the I
first is known as SDA and is the Serial Data line, the
second is known as SCL line and is the Serial Clock
line. As many devices may be connected together on
the same bus, their outputs are both open drain types.
For this reason it is necessary that external pull-high
resistors are connected to these outputs. Note that no
chip select line exists, as each device on the I
identified by a unique address which will be transmit-
ted and received on the I
When two devices communicate with each other on
the bidirectional I
device and one as the slave device. Both master and
slave can transmit and receive data, however, it is the
master device that has overall control of the bus. For
this device, which only operates in slave mode, there
are two methods of transferring data on the I
the slave transmit mode and the slave receive mode.
I
There are three control registers associated with the
I
ister, SIMDR.
2
2
2
C Interface Operation
C Registers
C bus, SIMC0, SIMC1 and SIMAR and one data reg-
2
C bus is a bidirectional 2-line communication inter-
2
C interface pins are pin-shared with segment
2
C bus, one is known as the master
2
C bus.
Slave Address Register - SIMAR
I
2
2
2
C interface
C Control Register - SIMC0
C bus, the
2
C bus is
2
C bus,
28
The SIMDR register is used to store the data being
transmitted and received on the I
microcontroller writes data to the I
data to be transmitted must be placed in the SIMDR
register. After the data is received from the I
the microcontroller can read it from the SIMDR regis-
ter. Any transmission of data to the I
tion of data from the I
SIMDR register.
The SIMAR register is the location where the slave
address of the microcontroller is stored. Bits 1~7 of
the SIMAR register define the microcontroller slave
address. Bit 0 is not defined. When a master device,
which is connected to the I
dress, which matches the slave address in the SIMAR
register, the microcontroller slave device will be se-
lected.
Note that the SIMAR register is the same register as
SIMC2 which is used by the SPI interface.
The SIMC0 register is used for the I
control.
I
There are several configuration options associated
with the I
RNIC bit function which selects the RNIC bit in SIMC1
register. Another configuration option determines the
debounce time of the I
debounce delay time to the external clock to reduce
the possibility of glitches on the clock line causing er-
roneous operation. The debounce time if selected can
be chosen to be either 1 or 2 system clocks.
2
C Configuration Option
2
C interface. One of these is to enable the
2
C bus must be made via the
2
C interface. This add a
2
C bus, sends out an ad-
2
C bus. Before the
2
C bus, the actual
2
2
C bus or recep-
C overall on/off
HT83FXX
May 12, 2009
2
C bus,