MC9S08SG32 FREESCALE [Freescale Semiconductor, Inc], MC9S08SG32 Datasheet - Page 194

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MC9S08SG32

Manufacturer Part Number
MC9S08SG32
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Chapter 12 Modulo Timer (S08MTIMV1)
12.1.4
The block diagram for the modulo timer module is shown
12.2
The MTIM includes one external signal, TCLK, used to input an external clock when selected as the
MTIM clock source. The signal properties of TCLK are shown in
The TCLK input must be synchronized by the bus clock. Also, variations in duty cycle and clock jitter must
be accommodated. Therefore, the TCLK signal must be limited to one-fourth of the bus frequency.
The TCLK pin can be muxed with a general-purpose port pin. See the
the pin location and priority of this function.
188
BUSCLK
XCLK
TCLK
MTIM
INTERRUPT
REQUEST
External Signal Description
Block Diagram
set_tof_pulse
SYNC
TOIE
Figure 12-2. Modulo Timer (MTIM) Block Diagram
Signal
TCLK
SOURCE
SELECT
CLOCK
REG
TOF
CLKS
MC9S08SG32 Data Sheet, Rev. 8
Table 12-1. Signal Properties
External clock source input into MTIM
AND SELECT
PRESCALE
DIVIDE BY
PS
Function
Figure
12-2.
Table
8-BIT COMPARATOR
Pins and Connections
12-1.
8-BIT COUNTER
8-BIT MODULO
(MTIMMOD)
(MTIMCNT)
I/O
I
Freescale Semiconductor
chapter for
TRST
TSTP

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