ATXMEGA128B3-AU ATMEL [ATMEL Corporation], ATXMEGA128B3-AU Datasheet - Page 18
ATXMEGA128B3-AU
Manufacturer Part Number
ATXMEGA128B3-AU
Description
8/16-bit Atmel XMEGA B3 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATXMEGA128B3-AU.pdf
(137 pages)
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9. Event System
9.1
9.2
8074B–AVR–02/12
Features
Overview
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The event system enables direct peripheral-to-peripheral communication and signaling. It allows
a change in one peripheral’s state to automatically trigger actions in other peripherals. It is
designed to provide a predictable system for short and predictable response times between
peripherals. It allows for autonomous peripheral control and interaction without the use of inter-
rupts, CPU, or DMA controller resources, and is thus a powerful tool for reducing the complexity,
size and execution time of application code. It also allows for synchronized timing of actions in
several peripheral modules.
A change in a peripheral’s state is referred to as an event, and usually corresponds to the
peripheral’s interrupt conditions. Events can be directly passed to other peripherals using a ded-
icated routing network called the event routing network. How events are routed and used by the
peripherals is configured in software.
Figure 9-1 on page 19
can directly connect together analog and digital converters, analog comparators, I/O port pins,
the real-time counter, timer/counters, IR communication module (IRCOM), and USB interface. It
can also be used to trigger DMA transactions (DMA controller). Events can also be generated
from software and the peripheral clock.
System for direct peripheral-to-peripheral communication and signaling
Peripherals can directly send, receive, and react to peripheral events
Four event channels for up to four different and parallel signal routings and configurations
Events can be sent and/or used by most peripherals, clock system, and software
Additional functions include
Works in active mode and idle sleep mode
– CPU and DMA controller independent operation
– 100% predictable signal timing
– Short and guaranteed response time
– Quadrature decoders
– Digital filtering of I/O pin state
shows a basic diagram of all connected peripherals. The event system
XMEGA B3
18
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