ATMEGA169PA-MCU ATMEL [ATMEL Corporation], ATMEGA169PA-MCU Datasheet - Page 7
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ATMEGA169PA-MCU
Manufacturer Part Number
ATMEGA169PA-MCU
Description
8-bit Microcontroller with 16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA169PA-MCU.pdf
(23 pages)
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.12
2.2.13
8171BS–AVR–03/10
Port E (PE7:PE0)
Port F (PF7:PF0)
Port G (PG5:PG0)
RESET
XTAL1
XTAL2
AVCC
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port E output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port E also serves the functions of various special features of the ATmega169PA as listed on
”Alternate Functions of Port E” on page
Port F serves as the analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins
can provide internal pull-up resistors (selected for each bit). The Port F output buffers have sym-
metrical drive characteristics with both high sink and source capability. As inputs, Port F pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port F
pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the
JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will
be activated even if a reset occurs.
Port F also serves the functions of the JTAG interface, see
page
Port G is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port G output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port G pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port G also serves the functions of various special features of the ATmega169PA as listed on
page
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
329. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-
nected to V
through a low-pass filter.
82.
84.
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
80.
”Alternate Functions of Port F” on
ATmega169PA
Table 28-3 on page
CC
7