R2J20701NP_08 RENESAS [Renesas Technology Corp], R2J20701NP_08 Datasheet - Page 14

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R2J20701NP_08

Manufacturer Part Number
R2J20701NP_08
Description
Peak Current Mode Synchronous Buck Controller with Power MOS FETs
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
R2J20701NP
Output Voltage Setting
The error amplifier of the device has an accurate 0.6 V reference voltage. Feedback thus leads to a voltage of about 0.6
V on the FB pin once the converter system has stabilized, so the output voltage is
Loop Compensation
Peak-current control makes design in terms of phase margins easier than is the case with voltage control. This is
because of differences between the characteristics of the PWM modulator and power stage in the two methods.
Figures 1 and 2 show the behavior of the PWM modulator and power stage in the cases of voltage control and peak
current control, respectively.
Feed-forward current to the modulator in the case of peak-current control means that the system is single pole, so we
see a –20 dB/decade cutoff and phase margin of 90° in the Bode plot. In voltage control, the system configures a two-
pole pole system. That is why rather complicated loop compensation of the error amplifier is required, such as type-III
compensation.
The design of effective compensation is thus much simpler in the case of peak-current control (refer to figure 3).
REJ03G1459-0400 Rev.4.00 Jun 30, 2008
Page 14 of 27
Figure 1 Bode Plot of Modulator + Power Stage
Gain
(dB)
Phase
(deg)
Vout = 0.6 V × (R1 + R2) / R2
180
0
(Voltage Mode)
R
C
TRK-SS
freq. (Hz)
freq. (Hz)
REG5
40 dB/dec
CT
FB
SW
Figure 2 Bode Plot of Modulator + Power Stage
Gain
(dB)
Phase
(deg)
180
90
0
(Peak Curent Mode)
Vout
R1
R2
freq. (Hz)
freq. (Hz)
20 dB/dec

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