ADP5587_1 AD [Analog Devices], ADP5587_1 Datasheet - Page 15

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ADP5587_1

Manufacturer Part Number
ADP5587_1
Description
Mobile I/O Expander and QWERTY Keypad Controller
Manufacturer
AD [Analog Devices]
Datasheet
REGISTERS
The general behavior of registers is as follows:
Table 15.
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
All registers are 0 on reset.
All registers are read/write unless otherwise specified.
Unused bits are read as 0.
Register Name
DEV_ID
CFG
INT_STAT
KEY_LCK_EC_STAT
KEY_EVENTA
KEY_EVENTB
KEY_EVENTC
KEY_EVENTD
KEY_EVENTE
KEY_EVENTF
KEY_EVENTG
KEY_EVENTH
KEY_EVENTI
KEY_EVENTJ
KP_LCK_TMR
UNLOCK1
UNLOCK2
GPIO_INT_STAT1
GPIO_INT_STAT2
GPIO_INT_STAT3
GPIO_DAT_STAT1
GPIO_DAT_STAT2
GPIO_DAT_STAT3
GPIO_DAT_OUT1
GPIO_DAT_OUT2
GPIO_DAT_OUT3
GPIO_INT_EN1
GPIO_INT_EN2
GPIO_INT_EN3
KP_GPIO1
KP_GPIO2
KP_GPIO3
GPI_EM_REG1
GPI_EM_REG2
GPI_EM_REG3
GPIO_DIR1
GPIO_DIR2
GPIO_DIR3
GPIO_INT_LVL1
GPIO_INT_LVL2
GPIO_INT_LVL3
DEBOUNCE_DIS1
Rev. B | Page 15 of 24
Description
Device ID
Configuration Register 1
Interrupt status register
Keylock and event counter register
Key Event Register A
Key Event Register B
Key Event Register C
Key Event Register D
Key Event Register E
Key Event Register F
Key Event Register G
Key Event Register H
Key Event Register I
Key Event Register J
Keypad Unlock 1 timer to Keypad Unlock 2 timer
Unlock Key 1
Unlock Key 2
GPIO interrupt status
GPIO interrupt status
GPIO interrupt status
GPIO data status, read twice to clear
GPIO data status, read twice to clear
GPIO data status, read twice to clear
GPIO data out
GPIO data out
GPIO data out
GPIO interrupt enable
GPIO interrupt enable
GPIO interrupt enable
Keypad or GPIO selection
Keypad or GPIO selection
Keypad or GPIO selection
GPI Event Mode 1
GPI Event Mode 2
GPI Event Mode 3
GPIO data direction
GPIO data direction
GPIO data direction
GPIO level detect
GPIO level detect
GPIO level detect
Debounce disable
Interrupt bits are cleared by writing 1 to the flag; writing 0
or reading the flag has no effect, with the exception of the
key press, key release, and GPIO interrupt status registers,
which are cleared on a read.
ADP5587

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