LT3756 LINER [Linear Technology], LT3756 Datasheet - Page 16

• Manufacturer Part Number: LT3756
• Description: 100VIN, 100VOUT LED Controller
• Manufacturer: LINER [Linear Technology]

LT3756/LT3756-1
Board Layout
The high speed operation of the LT3756 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the Exposed Pad and the ground plane of
the board. To reduce electromagnetic interference (EMI), it
is important to minimize the area of the high dV/dt switching
node between the inductor, switch drain and anode of the
Schottky rectifi er. Use a ground plane under the switching
node to eliminate interplane coupling to sensitive signals.
The lengths of the high dI/dt traces: 1) from the switch
node through the switch and sense resistor to GND, and
2) from the switch node through the Schottky rectifi er and
fi lter capacitor to GND should be minimized. The ground
points of these two switching current traces should come
to a common point then connect to the ground plane under
APPLICATIONS INFORMATION
TYPICAL APPLICATIONS
16
M1: VISHAY SILICONIX Si7454DP
D1: DIODES INC PDS5100
L1: COILTRONICS DR127-220
RT1: MURATA NCP18WM104J
M2: VISHAY SILICONIX Si2328DS
D2: IN4448HWT
V
(100V TRANSIENT)
IN
8V TO 60V
30W White LED Headlamp Driver with Thermal Derating
D2
4.7μF
INTV
CC
0.01μF
100k
1M
332k
16.9k
400kHz
10k
100k
NTC
RT1
28.7k
SHDN/UVLO
V
CTRL
OPENLED
PWM
SS
R
REF
T
V
C
0.001μF
10k
LT3756
V
GND
IN
PWMOUT
SENSE
INTV
L1, 22μH
GATE
ISN
ISP
FB
CC
4.7μF
10V
M1
0.018Ω
0.27Ω
D1
370mA
30W LED STRING
the LT3756. Likewise, the ground terminal of the bypass
capacitor for the INTV
the GND of the switching path. Typically, this requirement
will result in the external switch being closest to the IC,
along with the INTV
the compensation network and other DC control signals
should be star connected to the underside of the IC. Do
not extensively route high impedance signals such as FB
and VC, as they may pick up switching noise. In particular,
avoid routing FB and PWMOUT in parallel for more than
a few millimeters on the board. Since there is a small
variable DC input bias current to the ISN and ISP inputs,
resistance in series with these pins should be minimized
to avoid creating an offset in the current sense threshold.
Likewise, minimize resistance in series with the SENSE
input to avoid changes (most likely reduction) to the switch
current limit threshold.
1M
14k
M2
3756 TA02a
4.7μF
120
100
80
60
40
20
CC
0
25
CC
bypass capacitor. The ground for
V
regulator should be placed near
for NTC Resistor Divider
ISP
45
-V
ISN
TEMPERATURE (°C)
vs Temperature
65
85
105
37551 TA02b
125
37561f