LT3513 LINER [Linear Technology], LT3513 Datasheet
LT3513
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LT3513 Summary of contents
Page 1
... LOGIC SW3 5V FB3 V GND 10k 2.2μF 4.7k 30k 13k 4.7nF 1.5nF 2.2nF LT3513 2MHz High Current 5-Output Regulator for TFT-LCD Panels LOGIC and V required by the LCD panel. A high-side OFF signal and can ON Start-Up Waveforms RUN/SS 2V/DIV V 5V/DIV LOGIC AV 10V/DIV DD 15nF ...
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... LT3513EUHF#PBF LT3513EUHF#TRPBF LT3513IUHF#PBF LT3513IUHF#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. For more information on lead free part marking, go to: For more information on tape and reel specifi cations, go to: ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi ...
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... PGOOD Connected to 40V Through 100k V = 40V PGOOD 4.5V < V < 32V IN (Note 4) ΔI = 10μA Duty Cycle = 35% (Note 1.5A SW FB1 = 1. 1.5A (Note 1. 170mA 4.5V < V < 32V IN (Note 4) ΔI = 10μ 1.2A SW2 FB2 = 1. 1.2A SW2 LT3513 MIN TYP MAX UNITS 90 125 160 1.1 1.2 200 400 1.5 0.3 ● 1.2 1.90 2 2.12 ● 1.80 2.22 200 1.25 3.4 3.9 4 ...
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... Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3513E is guaranteed to meet specifi ed performance from 0°C to 125°C junction temperature. Specifi cations over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3513I is guarenteed over the full – ...
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... AMBIENT TEMPERATURE (°C) SW1 V CESAT 1000 900 800 700 600 500 400 300 200 100 0 0 500 1000 1500 2000 2500 SW1 CURRENT (mA) LT3513 T = 25°C, unless otherwise noted. A Start and Run V = 3.3V LOGIC START 6 IN(MIN RUN IN(MIN ...
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... LT3513 TYPICAL PERFORMANCE CHARACTERISTICS SW3 V CESAT 300 250 200 150 100 100 150 200 250 300 350 I (mA) SW3 3513 G10 Oscillator Frequency 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 50 –50 0 100 AMBIENT TEMPERATURE (°C) 3513 G13 BIAS Pin Current 10μ 10μ 10μH ...
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... This pin controls the output disconnect ON_CLK device and the open collector of V low, the V pin is enabled and the V ON impedance. When this pin is high, the V and the V ONSINK LT3513 Reference Voltage for FB5, LDO 670 660 650 640 630 620 610 600 – ...
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... LT3513 PIN FUNCTIONS PGOOD (Pin 11): Power Good Comparator Output. This is the open collector output of the power good comparator and can be used in conjunction with an external P-chan- nel MOSFET to provide output disconnect for AV shown in Figure 2. When switcher 2’s output reaches approximately 90% of its programmed voltage, PGOOD will be pulled to ground ...
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... Connect these pins to the inductor, catch diode and boost capacitor. V (Pins 36, 37): Input Voltage. This pin supplies current IN to the internal circuitry of the LT3513. This pin must be locally bypassed with a capacitor. UVLO (Pin 38): Undervoltage Lockout. A resistor divider connected input voltage at which the LT3513 will operate ...
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... LT3513 BLOCK DIAGRAM LDOPWR FB5 36,37 INTERNAL RUN-SS1 22 REGULATOR AND REFERENCE FB1 32 PGOOD 11 FB2 1.25V UVLO – 38 3μA RUN-SS3/4 SW3 3 LOCKOUT RUN-SS2 SW2 5 LOCKOUT FB3 GND 14,17,33 10 – 0.625V MASTER OSCILLATOR 2MHz – 1.234V SLOPE COMP/ ONE-SHOT – ...
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... Operation can be best understood by referring to the Block Diagram as shown in Figure 1. If the RUN-SS1 pin is pulled to ground, the LT3513 is shut down and draws 30μA from the input source tied internal 2μA current source charges the external soft- start capacitor, generating a voltage ramp at this pin ...
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... INPUT VOLTAGE RANGE STEP-DOWN CONSIDERATION The minimum operating voltage of switcher 1 is determined either by the LT3513’s undervoltage lockout of ~ its maximum duty cycle. A user defi ned undervoltage lockout may be set with the UVLO pin at a voltage higher than the internal undervoltage lockout. The duty cycle is ...
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... TYPE Δ MSS7341 Shielded LQH55D Open SLF7045 Shielded where f is the switching frequency of the LT3513 and L SLF10145 Shielded is the value of the inductor. The peak inductor and switch DC62CB Shielded current is: D63CB Shielded D75C Shielded D75F ...
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... The output capacitor fi lters the inductor current to generate an output with low voltage ripple. It also stores energy in order satisfy transient loads and stabilizes the LT3513’s control loop. Because the LT3513 operates at a high frequency, minimal output capacitance is necessary. In addition, the control loop operates well with or without the presence of output capacitor series resistance (ESR) ...
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... The duty cycle for a given application using the inverter or SEPIC is The LT3513 can still be used in applications where the duty cycle, as calculated above, is greater than the maximum. However, the part must be operated in discontinuous mode so that the actual duty cycle is reduced. LT3513 ⎞ ...
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... The maximum diode voltage in the SEPIC and inverting confi gurations is V Input Capacitor Selection Bypass the input of the LT3513 circuit with a 4.7μF or higher ceramic capacitor of X7R or X5R type. A lower value or a less expensive Y5V type will work if there is additional bypassing provided by bulk electrolytic capacitors or if the input source impedance is low ...
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... ON_CLK scanning frequency to improve LCD image quality. Low Voltage Dropout Linear Regulator The LT3513 features an output to drive an external NPN transistor LDO to provide a lower voltage logic supply volt- age. The output is capable of providing 10mA of current to the base of the NPN. The output of the LDO is controlled by the FB5 pin. Choose the resistor values according to: ⎛ ...
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... This ground should be tied to other copper layers below with thermal vias; these lay- ers will spread the heat dissipated by the LT3513. Place additional vias near the catch diodes. Adding more copper to the top and bottom layers and tying this copper to the internal planes with vias can reduce thermal resistance further ...
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... DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE LT3513 0.70 0.05 PACKAGE OUTLINE PIN 1 NOTCH R = 0.30 TYP OR ...
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