LT3505 LINER [Linear Technology], LT3505 Datasheet - Page 8

• Manufacturer Part Number: LT3505
• Description: Monolithic Dual Tracking 3A Step-Down Switching
• Manufacturer: LINER [Linear Technology]

LT3501
V
circuitry for both channels and is monitored by the under-
voltage lockout comparator. The V
to the collector of channel 1’s on-chip power NPN switch.
The V
to ground close to the pin of the device.
SW1/SW2 (Pins 2, 9): The SW pin is the emitter of the on-
chip power NPN. At switch-off, the inductor will drive this
pin below ground with a high dV/dt. An external Schottky
catch diode to ground, close to the SW pin and respective
V
this pin from excessive negative voltages.
IND1/IND2 (Pins 3, 8): The IND pin is the input to the
on-chip sense resistor that measures current flowing in
the inductor. When the current in the resistor exceeds
the current dictated by the V
reset, disabling the output switch. Bias current flows out
of the IND pin when IND is less than 1.6V.
V
the on-chip sense resistor that measures current flowing
in the inductor. When the current in the resistor exceeds
the current dictated by the V
reset, disabling the output switch. Bias current flows out
of the V
PG1/PG2 (Pins 5, 6): The power good pin is an open-col-
lector output that sinks current when the feedback falls
below 90% of its nominal regulating voltage. For V
above 1V, its output state remains true, although during
shutdown, V
its current sink capability is reduced. The PG pins can be
left open circuit or tied together to form a single power
good signal.
V
on-chip power NPN switch. This pin is independent of V
and may be connected to the same or a separate supply. In
either case, high dI/dt edges are present and decoupling
to ground must be used close to this pin.
pin FuncTions
8
IN1
IN
OUT1
IN2
decoupling capacitor’s ground, must be used to prevent
(Pin 10): The V
(Pin 1): The V
IN1
/V
OUT
OUT2
pin has high dI/dt edges and must be decoupled
pin when V
IN1
(Pins 4, 7): The V
undervoltage lockout or thermal shutdown,
IN2
IN1
OUT
pin is the collector of channel 2’s
pin powers the internal control
is less than 1.6V.
C
C
pin, the SW latch is held in
pin, the SW latch is held in
OUT
IN1
pin is also connected
pin is the output to
IN1
IN1
SS1/SS2 (Pins 19, 12): The SS1/2 pins control the soft-
start and sequence of their respective outputs. A single
capacitor from the SS pin to ground determines the output
ramp rate. For soft-start and output tracking/sequencing
details, see the Applications Information section.
V
error amplifier and the input to the peak switch current
comparator. It is normally used for frequency compensa-
tion, but can also be used as a current clamp or control
loop override. If the error amplifier drives V
maximum switch current level, a voltage clamp activates.
This indicates that the output is overloaded and current is
pulled from the SS pin, reducing the regulation point.
FB1/FB2 (Pins 17, 14): The FB pin is the negative input
to the error amplifier. The output switches regulate this
pin to 0.8V, with respect to the exposed ground pad. Bias
current flows out of the FB pin.
SHDN (Pin 15): The shutdown pin is used to turn off both
channels and control circuitry to reduce quiescent current
to a typical value of 9µA. The accurate 1.28V threshold and
input current hysteresis can be used as an undervoltage
lockout, preventing the regulator from operating until the
input voltage has reached a predetermined level. Force
the SHDN pin above its threshold or let it float for normal
operation.
R
of setting the constant switch frequency.
Connecting a resistor from the R
will set the R
resultant switching frequency will be set by the resistor
value. The minimum value of 15.4k and maximum value of
133k sets the switching frequency to 1.5MHz and 250kHz,
respectively.
Driving the R
synchronize the switch to the applied frequency. Synchro-
nization occurs on the rising edge of the clock signal after
C1
T
/SYNC (Pin 16): This R
/V
C2
(Pins 18, 13): The V
T
T
/SYNC pin to a typical value of 0.975V. The
/SYNC pin with an external clock signal will
T
/SYNC pin provides two modes
C
pin is the output of the
T
/SYNC pin to ground
C
above the
3501fd