X9523 INTERSIL [Intersil Corporation], X9523 Datasheet
X9523
Related parts for X9523
X9523 Summary of contents
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... All functions of the X9523 are accessed by an industry standard 2-Wire serial interface. The DCPs of the X9523 may be utilized to control the bias and modulation currents of the laser diode in a Fiber Optic module. The programmable POR circuit may be used to ensure that V1 / Vcc is stable before power is applied to the laser diode / module ...
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... These functions are suited to the control, support, and monitor- ing of various system parameters in fiber optic modules. The combination of the X9523 fucntionality lowers sys- tem cost, increases reliability, and reduces board space requirements using Intersil’s unique XBGA™ packaging. ...
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... C1, C2 Connect. 16 X9523 V TRIP3 threshold voltage, V3RO makes a transition to a HIGH when not used TRIP3 and goes LOW when V3 is less than VTRIP3. There is no delay circuitry after MR has returned to it’s normally LOW state. The reset time can be selected using ...
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... Data states on the SDA line can change only while SCL is LOW. SDA state changes while SCL is HIGH are reserved for indicating START and STOP conditions. See Figure 1.On power-up of the X9523, the SDA pin is in the input mode. Serial Start Condition All commands are preceded by the START condition, which is a HIGH to LOW transition of SDA while SCL is HIGH ...
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... Byte proto- col is used. All operations however must begin with the Slave Address Byte being issued on the SDA pin. The Slave address selects the part of the X9523 to be addressed, and specifies if a Read or Write opera- tion performed. ...
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... Issue STOP switches are controlled by the Wiper Counter Register (WCR) (See Figure 6). The WCR is a volatile register. On power-up of the X9523, wiper position data is auto- matically loaded into the WCR from its associated Non Volatile Memory (NVM) Register. The Table below shows the Initial Values of the DCP WCR’s before the contents of the NVM is loaded into the WCR ...
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... Hot Pluggability Figure 7 shows a typical waveform that the X9523 might experience in a Hot Pluggable situation. On power-up Vcc applied to the X9523 may exhibit some amount of ringing, before it settles to the required value. The device is designed such that the wiper terminal ( recalled to the correct position (as per the last ...
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... Figure 8. Instruction Byte Format WCR and NVM. Therefore, the new “wiper position” set- ting is recalled into the WCR after V1/Vcc of the X9523 has been powered down then powered back up “0” then a DCP Volatile Write is performed. This operation changes the DCP “wiper position” by writing new data to the associated WCR only ...
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... ACKNOWLEDGE is returned by the X9523. Following this ACKNOWLEDGE, the master immediately issues another START condition and a valid Slave address byte with the R/W bit set to 1. Then the X9523 issues an ACKNOWLEDGE followed by Data Byte, and finally, the master issues a STOP condition. The Data Byte read in this operation, corresponds to the “ ...
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... RWEL WEL POR0 reset to “0” (by writing 00000000 to the CONSTAT regis- ter) or until the X9523 powers down, and then up again. NV Writes to the WEL bit do not cause an internal high volt- age write cycle. Therefore, the device is ready for another operation immediately after a STOP condition is executed in the CONSTAT Write command sequence (See Figure 13) ...
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... CONSTAT register Write operation. The user must issue a STOP, after sending this byte to the register, to initiate the nonvolatile cycle that stores the DWLK, POR1 and POR0 bits. The X9523 will not ACKNOWLEDGE any ) data bytes written after the first byte is entered (Refer to PUV1RO Figure 13 ...
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... A write to the CONSTAT register itself, further requires the setting of the RWEL bit. DCP Write Lock protection of the device enables the user to inhibit writes to all the DCPs. One further level of data protec- tion in the X9523, is incorporated in the form of the Write Protection pin. DCP Volatile Write DCP Nonvolatile ...
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... After this time, the PURST V1RO pin is driven to a LOW state. See Figure 25. For the Power-on/Low Voltage Reset function of the X9523, the V1RO output may be driven HIGH down to a V1/Vcc See Figure 25. Another feature RVALID of the X9523, is that the value of t PURST in software via the CONSTAT register (See “ ...
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... Figure 17. Setting V V THRESHOLDS (X = 1,2,3) TRIPX The X9523 is shipped with pre-programmed threshold (V ) voltages. In applications where the required TRIPx thresholds are different from the default values higher precision/tolerance is required, the X9523 trip points may be adjusted by the user, using the steps detailed below. ...
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... V1/Vcc need be applied. In all cases, care should be taken not to exceed the maximum input voltage limits. 15 X9523 After applying the test voltage to the voltage monitor input pin, the test voltage can be decreased (either in dis- crete steps, or continuously) until the output of the volt- age monitor circuit changes state ...
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... Sequence Apply Vcc & Voltage > Desired V Decrease Vx NO switches? Actual V – Error < MDE - Desired V Figure 19. V Setting / Reset Sequence (x = 1,2,3) TRIPx 16 X9523 Note 1,2,3. Programming Let: MDE = Maximum Desired Error < TRIPx Desired Value YES Execute Reset TRIPx Execute New Vx applied = - Old Vx applied | Error | ...
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... Exposure to absolute maximum rating conditions for extended peri- ods may affect device reliability Figure 20. Equivalent A.C. Circuit Figure 21. DCP SPICE Macromodel 17 X9523 Parameter (x = 0,1, Referenced to Vss ...
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... F SCL t SU:DAT t SU:STA t HD:STA SDA IN SDA OUT Figure 23. WP Pin Timing START SCL SDA IN t SU:WP WP Figure 24. Write Cycle Timing SCL 8th bit of last byte SDA 18 X9523 HIGH LOW R t HD:DAT t AA Clk 1 Clk 9 t HD:WP ACK t WC Stop Condition t SU:STO t ...
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... R V1/Vcc 0 Volts V1RO 0 Volts MR 0 Volts Figure 26. Manual Reset Timing Diagram MR V1RO V1 / Vcc Figure 27. V2, V3 Timing Diagram RPDx VxRO V1/Vcc Note : x = 2,3. 19 X9523 t t PURST t RPD t MRPW 0 Volts t MRD 0 Volts t t RPDx RPDx TRIP1 PURST t PURST V1/Vcc ...
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... NOTE : V1/Vcc must be greater than V2, V3 when programming. Figure 29. DCP “Wiper Position” Timing Rwx (x = 0,1,2) R wx( tap position SCL SDA SLAVE ADDRESS BYTE T 20 X9523 V TRIPx 00h INSTRUCTION BYTE t THD t VPO ...
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... with all other an µA alog pins floating ( GND to V µA OUT 10 X9523 is in Standby 4.70 V 4.70 V 3.05 Factory shipped default option A V 4.75 Factory shipped default option B 1.85 Factory shipped default option A V 3.05 Factory shipped default option B 1.85 Factory shipped default option ...
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... STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used. Notes: 5. This parameter is not 100% tested. 22 X9523 Parameter Parameter = 5V) CC Parameter = 5 ...
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... Notes: 3. Relative Linearity is a measure of the error in step size between taps = R Notes Minimum Increment = R TOT Notes: 5. Typical values are for T = 25°C and nominal supply voltage. A Notes: 6. This parameter is periodically sampled and not 100% tested. 23 X9523 Limits Min. Typ. -20 Vss Vss 200 ...
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... Notes: 3. This parameter describes the lowest possible V1/Vcc level for which the outputs V1RO, V2RO, and V3RO will be correct with respect to their inputs (V1/Vcc, V2, V3). Notes: 4. From MR rising edge crossing V Notes: 5. The above parameters are not 100% tested. 24 X9523 Description o C ...
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... X9523 Data Byte Binary 0000 0000 0000 0001 . . 0001 0111 0001 1000 0011 1000 0011 0111 . . 0010 0001 0010 0000 0100 0000 0100 0001 . . 0101 0111 0101 1000 0111 1000 0111 0111 . . 0110 0001 0110 0000 FN8209 ...
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... X9523 wcr_val = 56; offset = tap_pos - 25; for (i=0; i<= offset; i++) wcr_val-- ; return ((unsigned)++wcr_val); wcr_val = 64; offset = tap_pos - 50; for (i=0; i<= offset; i++) wcr_val++ ; return ((unsigned)--wcr_val); wcr_val = 120; offset = tap_pos - 75; for (i=0; i<= offset; i++) wcr_val-- ; return ((unsigned)++wcr_val); FN8209.0 March 10, 2005 ...
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... Tap DCP encoding formula */ if (tap_pos > 74) return ((unsigned) (195 - tap_pos)); else if (tap_pos > 49) return ((unsigned) (14 + tap_pos)); else if (tap_pos > 24) return ((unsigned) (81 - tap_pos)); else return (tap_pos X9523 /* set to min val */ /* set to max val */ FN8209.0 March 10, 2005 ...
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... Body Thickness Ball Height Ball Diameter Ball Pitch – X Axis Ball Pitch – Y Axis Ball to Edge Spacing – Distance Along X Ball to Edge Spacing – Distance Along Y 28 X9523 20 Ball BGA (X9523 Bottom View (Bump Side Up) d Ball Matrix e ...
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... PLASTIC, TSSOP PACKAGE TYPE V .025 (.65) BSC .252 (6.4) .260 (6.6) .0075 (.19) .0118 (.30) 0° - 8° .019 (.50) .029 (.75) Detail A (20X) See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) 29 X9523 .169 (4.3) .252 (6.4) BSC .177 (4.5) .047 (1.20) .002 (.05) .006 (.15) .010 (.25) Gage Plane Seating Plane (1.78) (0.42) .031 (.80) ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 30 X9523 - y P ...