STM8L151G4Y3 STMICROELECTRONICS [STMicroelectronics], STM8L151G4Y3 Datasheet - Page 14
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STM8L151G4Y3
Manufacturer Part Number
STM8L151G4Y3
Description
8-bit ultralow power MCU, up to 32 KB Flash, 1 KB Data EEPROM RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM8L151G4Y3.pdf
(122 pages)
- Current page: 14 of 122
- Download datasheet (3Mb)
Functional overview
3.1
3.2
3.2.1
14/122
Low power modes
The STM8L15xxx supports five low power modes to achieve the best compromise between
low power consumption, short startup time and available wakeup sources:
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Central processing unit STM8
Advanced STM8 Core
The 8-bit STM8 core is designed for code efficiency and performance with an Harvard
architecture and a 3-stage pipeline.
It contains 6 internal registers which are directly addressable in each execution context, 20
addressing modes including indexed indirect and relative addressing, and 80 instructions.
Architecture and registers
●
●
●
●
Wait mode: CPU clock is stopped, but selected peripherals keep running. An internal
or external interrupt or a Reset can be used to exit the microcontroller from Wait mode
(WFE or WFI mode). Wait consumption: refer to
Low power run mode: The CPU and the selected peripherals are running. Execution
is done from RAM with a low speed oscillator (LSI or LSE). Flash and data EEPROM
are stopped and the voltage regulator is configured in Ultralow power mode. The
microcontroller enters Low power run mode by software and can exit from this mode by
software or by a reset.
All interrupts must be masked. They cannot be used to exit the microcontroller from this
mode. Low power run mode consumption: refer to
Low power wait mode: This mode is entered when executing a Wait for event in Low
power run mode. It is similar to Low power run mode except that the CPU clock is
stopped. The wakeup from this mode is triggered by a Reset or by an internal or
external event (peripheral event generated by the timers, serial interfaces, DMA
controller (DMA1), comparators and I/O ports). When the wakeup is triggered by an
event, the system goes back to Low power run mode.
All interrupts must be masked. They cannot be used to exit the microcontroller from this
mode. Low power wait mode consumption: refer to
Active-halt mode: CPU and peripheral clocks are stopped, except RTC. The wakeup
can be triggered by RTC interrupts, external interrupts or reset. Active-halt
consumption: refer to
Halt mode: CPU and peripheral clocks are stopped, the device remains powered on.
The wakeup is triggered by an external interrupt or reset. A few peripherals have also a
wakeup from Halt capability. Switching off the internal reference voltage reduces power
consumption. Through software configuration it is also possible to wake up the device
without waiting for the internal reference voltage wakeup time to have a fast wakeup
time of 5 µs. Halt consumption: refer to
Harvard architecture
3-stage pipeline
32-bit wide program memory bus - single cycle fetching most instructions
X and Y 16-bit index registers - enabling indexed addressing modes with or without
Table 23
Doc ID 15962 Rev 5
and
Table
Table
24.
25.
Table
Table
Table
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22.
STM8L151xx, STM8L152xx
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