STM810LW16F STMICROELECTRONICS [STMicroelectronics], STM810LW16F Datasheet - Page 6

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STM810LW16F

Manufacturer Part Number
STM810LW16F
Description
Reset Circuit
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
STM809/810/811/812
OPERATION
Reset Output
The STM809/810/811/812 MICROPROCESSOR
RESET CIRCUIT asserts a reset signal to the
MCU whenever V
old (V
(MR) is taken low (see
(active high for STM810/812) is guaranteed valid
down to V
During power-up, once V
threshold an internal timer keeps RST low for the
reset time-out period, t
returns high.
If V
low. Each time RST is asserted, it stays low for at
least the reset time-out period. Any time V
below the reset threshold, the internal timer clears.
The reset timer starts when V
reset threshold. The active-low reset (RST) and
active-high reset (RST) both source and sink cur-
rent.
Push-Button Reset Input (STM811/812)
A logic low on MR asserts RST. RST remains as-
serted while MR is low, and for t
high. The MR input has an internal 20k
resistor, allowing it to be left open if not used. This
input can be driven with TTL/CMOS-logic levels or
with open-drain/collector outputs. Connect a nor-
mally open push-button switch from MR to GND to
create a manual reset function; external debounce
circuitry is not required. If the device is used in a
noisy environment, connect a 0.1µF capacitor
from MR to GND to provide additional noise immu-
nity.
6/18
CC
RST
drops below the reset threshold, RST goes
), or when the push-button reset input
CC
= 1V (0° to 70°C).
CC
goes below the reset thresh-
rec
Figure 15., page
. After this interval, RST
CC
CC
exceeds the reset
returns above the
rec
after it returns
11). RST
CC
pull-up
goes
Negative-Going V
The STM809/810/811/812 are relatively immune
to negative-going V
13., page 9
sus reset comparator overdrive (for which the
STM809/810/811/812 will NOT generate a reset
pulse). The graph was generated using a negative
pulse applied to V
actual reset threshold and ending below it by the
magnitude indicated (comparator overdrive). The
graph indicates the maximum pulse width a nega-
tive V
set pulse. As the magnitude of the transient
increases (further below the threshold), the maxi-
mum allowable pulse width decreases. Any com-
bination of duration and overdrive which lies under
the curve will NOT generate a reset signal. Typi-
cally, a V
reset threshold and lasts 20µs or less will not
cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possible to the V
vides additional transient immunity.
Valid /RST Output Down to V
When V
output no longer sinks current, but becomes an
open circuit. In most systems this is not a problem,
as most MCUs do not operate below 1V. However,
in applications where RST output must be valid
down to 0V, a pull-down resistor may be added to
hold the RST output low. This resistor must be
large enough to not load the RST output, and still
be small enough to pull the output to ground. A
100K
Note: The same situation applies for the active-
high RST of the STM810/812. A 100K pull-up re-
sistor to V
valid for V
CC
resistor is recommended.
CC
transient can have without causing a re-
CC
CC
CC
falls below 1V, the RST (STM809/811)
shows typical transient duration ver-
transient that goes 100mV below the
< 1.0V.
should be used if RST must remain
CC
CC
CC
, starting at 0.5V above the
Transients
transients (glitches).
CC
= 0V
CC
pin pro-
Figure

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