LT3023 LINER [Linear Technology], LT3023 Datasheet - Page 11

• Manufacturer Part Number: LT3023
• Description: Dual 100mA, Low Dropout, Low Noise, Micropower Regulator
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or
microphone works. For a ceramic capacitor the stress
can be induced by vibrations in the system or thermal
transients. The resulting voltages produced can cause
appreciable amounts of noise, especially when a ceramic
capacitor is used for noise bypassing. A ceramic capaci-
tor produced Figure 5’s trace in response to light tapping
from a pencil. Similar vibration induced behavior can
masquerade as increased output voltage noise.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125 C). The
power dissipated by the device will be made up of two
components (for each channel):
1. Output current multiplied by the input/output voltage
2. GND pin current multiplied by the input voltage:
The ground pin current can be found by examining the
GND Pin Current curves in the Typical Performance
Characteristics section. Power dissipation will be equal to
the sum of the two components listed above. Power
Figure 5. Noise Resulting from Tapping on a Ceramic Capacitor
differential: (I
(I
GND
500 V/DIV
)(V
V
OUT
IN
).
C
C
I
LOAD
OUT
BYP
OUT
= 0.01 F
= 10 F
= 100mA
U
)(V
IN
100ms/DIV
U
– V
OUT
), and
W
3023 F05
U
dissipation from both channels must be considered dur-
ing thermal analysis.
The LT3023 regulator has internal thermal limiting de-
signed to protect the device during overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125 C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. MSE Package, 10-Lead MSOP
*Device is mounted on topside.
Table 2. DD Package, 10-Lead DFN
*Device is mounted on topside.
The thermal resistance juncton-to-case (
at the Exposed Pad on the back of the die is 10 C/W.
TOPSIDE*
TOPSIDE*
2500mm
1000mm
2500mm
1000mm
225mm
100mm
225mm
100mm
COPPER AREA
COPPER AREA
2
2
2
2
2
2
2
2
BACKSIDE
BACKSIDE
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2
2
2
2
2
2
2
2
BOARD AREA (JUNCTION-TO-AMBIENT)
BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2
2
2
2
2
2
2
2
THERMAL RESISTANCE
THERMAL RESISTANCE
JC
40 C/W
45 C/W
50 C/W
62 C/W
40 C/W
45 C/W
50 C/W
62 C/W
), measured
LT3023
11
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