ADP3204JCP-REEL7 AD [Analog Devices], ADP3204JCP-REEL7 Datasheet

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ADP3204JCP-REEL7

Manufacturer Part Number
ADP3204JCP-REEL7
Description
3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs
Manufacturer
AD [Analog Devices]
Datasheet
a
GENERAL DESCRIPTION
The ADP3204 is a 1-, 2-, or 3-phase hysteretic peak current
dc-to-dc buck converter controller dedicated to power a mobile
processor’s core. The optimized low voltage design is powered
from the 3.3 V system supply. The nominal output voltage is
set by a 5-bit VID code. To accommodate the transition time
required by the newest processors, the ADP3204 features
high speed operation to allow a minimized inductor size that
results in the fastest change of current to the output. To
further allow for the minimum number of output capacitors
to be used, the ADP3204 features active voltage positioning
with ADOPT optimal compensation to ensure a superior
load transient response. The output signals interface with a
maximum of three ADP3415 MOSFET drivers that are
optimized for high speed and high efficiency for driving both the
top and bottom MOSFETs of the buck converter. The
ADP3204 is capable of controlling the synchronous rectifiers to
extend battery lifetime in light load conditions.
ADOPT is a trademark of Analog Devices, Inc.
*Protected by U.S.Patent No. 5,969,657; other patents pending.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
FEATURES
Pin Selectable 1-, 2-, or 3-Phase Operation
Static and Dynamic Current Sharing Characteristics
Backward Compatible to IMVP-II
Superior Load Transient Response with ADOPT
Analog Devices’ Optimal Positioning Technology
Noise-Blanking for Speed and Stability
Synchronous Rectifier Control Extends Battery Life
Smooth Output Transition During VID Code Change
Cycle-by-Cycle Current Limiting
Hiccup or Latched Overload Protection
Transient-Glitch-Free Power Good
Soft Start Eliminates Power-On In-Rush Current Surge
Two-Level Overvoltage and Reverse Voltage
APPLICATIONS
IMVP-II and IMVP-III Core DC-to-DC Converters
Fixed Voltage Mobile CPU Core DC-to-DC Converters
Notebook/Laptop Power Supplies
Programmable Output Power Supplies
Protection
®
Core Controller for Mobile CPUs
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel:
Fax: 781/326-8703
DPRSHIFT
DPRSLP
HYSSET
PWRGD
DSHIFT
BSHIFT
DPSLP
781/329-4700
3-Phase IMVP-II and IMVP-III
BOM
VID4
VID3
VID2
VID1
VID0
SD
ADP3204
FUNCTIONAL BLOCK DIAGRAM
DPRSLP
GEN
SHIFT SELECTOR
DPRSLP
VID
DETECTOR AND
PWRGD BLANKER
ENABLE UVLO-MAIN BIAS
VID TRANSIENT
DPSLP
BOM
EN
CORE
MUX
AND
REG
VID
CLIM
PM MODULE
HYSTERESIS
SHIFT-MUX
SETTING
VCC
AND
GND
5-BIT VID
SS-HICCUP TIMER
COREGD MONITOR
FIXED
DAC
AND
REF
AND OCP
© Analog Devices, Inc., 2002
SR CONTROL
OVP AND RVP
ADP3204
VR
SPLITTER
CURRENT
VR
PHASE
SENSE
MUX
www.analog.com
OUT1
CS3
CS2
CS1
CS+
CS–
RAMP
REG
DACOUT
DACRAMP
OUT3
OUT2
COREFB
SS
DRVLSD
CLAMP
*

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ADP3204JCP-REEL7 Summary of contents

Page 1

FEATURES Pin Selectable 1-, 2-, or 3-Phase Operation Static and Dynamic Current Sharing Characteristics Backward Compatible to IMVP-II Superior Load Transient Response with ADOPT Analog Devices’ Optimal Positioning Technology Noise-Blanking for Speed and Stability Synchronous Rectifier Control Extends Battery ...

Page 2

ADP3204–SPECIFICATIONS 100 =10 pF, C OUT1 OUT2 OUT3 SS DPRSHIFT are open, BOM = H, DPSLP = H, DPRLP = L, unless otherwise noted.) Current sunk by a pin has a positive sign, ...

Page 3

Parameter CORE COMPARATOR Input Offset Voltage (Ramp-Reg) Input Bias Current Output Voltage (OUT1, OUT2, and OUT3) Propagation Delay Time Rise and Fall Time (OUT1, OUT2, and OUT3) Noise Blanking Time CURRENT LIMIT COMPARATOR Input Offset Voltage Input Bias Current Propagation ...

Page 4

ADP3204 Parameter SHIFT SETTING Battery-Shift Current Battery-Shift Reference Voltage Deep Sleep-Shift Current Deep Sleep-Shift Reference Voltage Deeper Sleep-Shift Current Deeper Sleep-Shift Reference Voltage SHIFT CONTROL INPUTS BOM Threshold (CMOS Input) DPSLP Threshold (CMOS Input) 8 DPRSLP Mode Threshold (CMOS Input) ...

Page 5

... ABSOLUTE MAXIMUM RATINGS* Input Supply Voltage (VCC –0 All Other Inputs/Outputs . . . . . . . . . . . . –0 Junction Temperature Range . . . . . . . . . . . . . . 0°C to +150°C Model ADP3204JCP-REEL ADP3204JCP-REEL7 0ºC to 100ºC VID4 ...

Page 6

ADP3204 Pin Mnemonic Function 1–5 VID[4:0] Voltage Identification Inputs. These are the VID inputs for logic control of the programmed reference voltage that appears at the DACOUT pin, and, via external component configura- tion, is used for setting the output ...

Page 7

Pin Mnemonic Function 11 CLAMP Clamp (Active High). This is open-drain output pin, via the assistance of an external pull-up resistor, indicates that the core voltage should be clamped for its protection. To allow the highest level of protection, the ...

Page 8

ADP3204 Pin Mnemonic Function 24 VCC Power Supply. This should be connected to the system’s 3.3 V power supply output. 25 RAMP Regulation Ramp Feedback Input. The RAMP pin voltage is compared against the REG pin for cycle-by-cycle switching response. ...

Page 9

Pin Mnemonic Function 32 DPRSHIFT Deeper Sleep Shift. This is an analog I/O pin whose output is a fixed voltage reference and whose input current is programmed by an external resistor to ground. The current is used to set two ...

Page 10

ADP3204–Typical Performance Characteristics 10000 NORMAL OPERATING MODE 1000 UVLO MODE 100 SHUTDOWN MODE AMBIENT TEMPERATURE – C TPC 1. Supply Current vs. Temperature 1.77 +1% 1.76 FULL SCALE 1.75 1. ...

Page 11

OUT = HIGH, RHYS = 17k OUT = HIGH, RHYS = 170k 0 OUT = LOW, RHYS = 170k OUT = LOW, RHYS = 17k –110 TEMPERATURE – C TPC 7. Core Hysteresis Current vs. Temperature ...

Page 12

ADP3204 SoftStart and Hiccup A capacitor from the SS pin to ground determines both the soft start time and the frequency at which hiccup will occur under a continuous short circuit or overload. System Signal Interface Several pins of the ...

Page 13

Power Switching Circuitry ADP3415, MOSFETs, and Input Capacitors 3. Locate the ADP3415 near the MOSFETs so that the loop inductance in the path of the top gate drive returned to the SW pin is small, and similarly for the bottom ...

Page 14

ADP3204 OUT LOAD REF Figure 2. Conventional Hysteretic Regulator and Its Characteristic Waveforms Since there is no voltage error amplifier ...

Page 15

During the common off time of all channels, their currents are averaged and compared to the lower threshold. When the averaged channel current reaches the lower threshold, the hysteretic comparator changes state again, and turns on the control ...

Page 16

ADP3204 PIN 1 INDICATOR 12 MAX 1.00 0.90 0.80 SEATING PLANE OUTLINE DIMENSIONS 32-Lead Frame Chip Scale Package [LFCSP] (CP-32) Dimensions shown in millimeters 5.00 0.60 MAX BSC SQ 0.60 MAX 25 24 0.50 4.75 BSC TOP BSC SQ VIEW ...

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