LT3686 LINER [Linear Technology], LT3686 Datasheet - Page 18

• Manufacturer Part Number: LT3686
• Manufacturer: LINER [Linear Technology]

ApplicAtions inForMAtion
LT3686
below the minimum voltage to sustain boosted operation
(2.2V across the boost capacitor), the output voltage will
fall suddenly to:
Figure 9 shows the minimum V
boosted operation during dropout. Once V
the sustain voltage, V
again to refresh the boost capacitor. The programmable
undervoltage lockout (UVLO) function can be used to avoid
operating unless V
Fixed Frequency at Light Load
The LT3686 contains unique active load circuitry to allow
for full frequency switching at very light loads. To enable
the active load, tie the MODE pin to greater than 0.8V.
Typical fixed frequency nonsynchronous buck regulators
skip pulses at light loads. With a fixed input voltage, as the
load current decreases in discontinuous mode, the regula-
tor is required to switch for shorter periods of time. When
the required on time decreases below the typical minimum
on time, the regulator skips one or more pulses so the
effective average duty cycle is equal to the required duty
cycle. This likelihood of entering pulse-skipping is exacer-
bated by the tendency for minimum on time to increase at
very light loads. Pulse-skipping is undesirable because it
causes unpredictable, sub-harmonic output ripple that can
interfere with the operation of other sensitive components
such as AM receivers and audio equipment.
The BD active load is designed to combat pulse-skipping
by providing an operational regime between full frequency
discontinuous and pulse-skipping modes.
The maximum V
ous mode is directly dependent on load current; as the
load decreases, so does the pulse-skipping boundary. An
artificial load on the output helps push the pulse-skip-
ping boundary higher. The LT3686 achieves this goal by
commanding the minimum load necessary to keep itself
at full switching frequency, hence the circuitry is called
an active load.
As the LT3686 approaches minimum on time in discontinu-
ous mode, its power switch transitions smoothly into a
fixed on time, fixed frequency open loop current source.

V
OUT
= (V
IN
– 2.2) • DC
IN
IN
before pulse-skipping in discontinu-
IN
is greater than the start voltage.
will need to reach the start voltage
MAX
IN
necessary to sustain
IN
drops below
Instead of controlling switch current, the internal error
amplifier servos the active load on the output via the BD
pin to maintain output voltage regulation. The impact on
efficiency is mitigated by pulling the minimum current
necessary to keep switching at full frequency. The neces-
sary BD load to maintain output regulation depends on
V
BD load increases beyond its 40mA limit, pulse-skipping
mode will resume.
The BD active load circuitry is enabled when MODE tied high
and disabled when MODE is tied low. Even when activated,
the active load will shutdown when BD voltage exceeds
either 5.2V or V
and intelligently react to external configurations.
To address the startup concerns delineated in the BOOST
and BD Pin Considerations section, the active load will
assist startup by pulling maximum current (40mA) to
charge the boost capacitor voltage in the absence of an
adequate load. An internal power good circuit will disable
the BD active load when V
pares plots of minimum input voltage to start and run as
a function of load current. In many cases the discharged
output capacitor will present a load to the switcher which
will allow it to start. The plots show the worst-case situ-
ation where V
The active load also activates to hasten the recharge of
boost cap when operating beyond maximum duty cycle.
When not in use, the active load pulls no current.
IN
, inductor size, and load current. As the necessary
Figure 10. Regions of Operation (5V
40
35
30
25
20
15
10
5
0
0
ACTIVE
LOAD
IN
IN
20
is ramping very slowly.
in an effort to minimize power dissipation
40
I
OUT
DCM
60
(mA)
FB
PULSE-SKIPPING
reaches 0.7V. Figure 9 com-
80
CCM
100
120
OUT
, 2MHz)
140
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