AT17F16-30CC ATMEL [ATMEL Corporation], AT17F16-30CC Datasheet
AT17F16-30CC
Related parts for AT17F16-30CC
AT17F16-30CC Summary of contents
Page 1
... Table 1. AT17F Series Packages Package 8-lead LAP 20-lead PLCC 44-lead PLCC 44-lead TQFP ® ™ , APEX ™ ™ ™ ® , XC4000 , XC5200 , Spartan , Virtex AT17F16 Yes Yes Yes Yes Devices, FPGA ® FPGAs, Configuration Flash Memory AT17F16 Advance Information Rev. 3392A–CNFG–10/03 1 ...
Page 2
... Pin Configuration AT17F16 2 8-lead LAP DATA 1 8 VCC CLK 2 7 SER_EN RESET/OE CEO (A2 GND 20-lead PLCC CLK RESET/ PAGESEL1 SER_EN PAGE_EN READY CEO (A2) 3392A–CNFG–10/03 ...
Page 3
3392A–CNFG–10/03 44 PLCC TQFP 1 2 ...
Page 4
... PAGE_EN Config. Page PAGESEL0 Select PAGESEL1 Flash Memory Device Description AT17F16 4 Reset 2-wire Serial Programming CE/WE/OE Data Address The control signals for the configuration memory device (CE, RESET/OE and CLK) interface directly with the FPGA device control signals. All FPGA devices can control the entire configuration process and retrieve data from the configuration device without requiring an external intelligent controller ...
Page 5
... This input works in conjunction with the PAGESEL inputs. PAGE_EN must be remain low if paging is not desired. When SER_EN is Low (ISP mode) this pin has no effect. Notes: 1. This pin has an internal This pin has an internal 30 K AT17F16 LAP PLCC PLCC ...
Page 6
... SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications, SER_EN should be tied to V +3.3V (±10%). Notes: 1. This pin has an internal This pin has an internal 30 K AT17F16 (16 Mbits) 00000 – 3FFFFh 40000 – 7FFFFh 80000 – BFFFFh C0000 – FFFFFh 00000 – FFFFFh and GND is recommended ...
Page 7
FPGA Master Serial Mode Summary Control of Configuration Cascading Serial Configuration Devices Programming Mode Standby Mode 3392A–CNFG–10/03 The I/O and logic functions of any SRAM-based FPGA are established by a configura- tion program. The program is loaded either automatically upon ...
Page 8
... Exposure to Abso- lute Maximum Rating conditions for extended periods of time may affect device reliability. AT17F Series Configurator Min Max 2.97 3.63 2.97 3.63 AT17F16 Min Max 2 0.8 2.4 0.4 2.4 0.4 40 ...
Page 9
AC Characteristics CE RESET/OE CLK T CE DATA AC Characteristics when Cascading RESET/OE CE CLK T DATA T CEO 3392A–CNFG–10/03 T SCE CAC CDF LAST BIT T OCK OCE T SCE T T ...
Page 10
... Notes: 1. Preliminary specifications for military operating range only test lead = 50 pF. 3. Float delays are measured with loads. Transition is measured ± 200 mV from steady-state active levels. 4. See the AT17F Programming Specfication for procedural information. AT17F16 10 AT17F16 Min Commercial (1) Industrial Commercial (1) ...
Page 11
... AC test lead = 50 pF. 2. Float delays are measured with loads. Transition is measured ± 200 mV from steady-state active levels. 3392A–CNFG–10/03 Min Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial AT17F16 Max Units ...
Page 12
... Thermal Resistance Coefficients Package Type 8CN4 Leadless Array Package (LAP) 20J Plastic Leaded Chip Carrier (PLCC) 44A Thin Plastic Quad Flat Package (TQFP) 44J Plastic Leaded Chip Carrier (PLCC) Note: 1. Airflow = 0 ft/min. AT17F16 12 AT17F16 [ C/W] – JC (1) [ C/W] – C/W] – JC (1) [ C/W] – C/W] ...
Page 13
... Ordering Information Memory Size 16-Mbit AT17F16-30CC AT17F16-30JC AT17F16-30TQC AT17F16-30BJC AT17F16-30CI AT17F16-30JI AT17F16-30TQI AT17F16-30BJI 8CN4 8-lead mm, Leadless Array Package (LAP) – Pin-compatible with 8-lead SOIC/VOID Packages 20J 20-lead, Plastic J-leaded Chip Carrier (PLCC) 44A 44-lead, Thin (1.0 mm) Plastic Quad Flat Package Carrier (TQFP) ...
Page 14
... Marked Pin1 Indentifier E Top View 0.10 mm TYP Bottom View Note: 1. Metal Pad Dimensions. 2325 Orchard Parkway San Jose, CA 95131 R AT17F16 14 D Side View Pin1 Corner TITLE 8CN4, 8-lead ( 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) A ...
Page 15
PLCC 1.14(0.045) X 45˚ B 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension ...
Page 16
... This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT17F16 TITLE 44A, 44-lead Body Size, 1 ...
Page 17
PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. ...
Page 18
Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem ...